An Upper Bound for 3D Slicing Floorplans. - Silke Salewski; Erich Barke (ASP-DAC/VLSI Design, 2002)

Wirelength Reduction Using 3-D Physical Design. - Idris Kaya; Silke Salewski; Markus Olbrich; Erich Barke (PATMOS, 2004)