SOC Design Challenges in a Multi-threaded 65nm Dual Core Xeon® MP Processor. - Raj Varada; Simon Tarn; John Benoit; Kris Chou (SoCC, 2006)

An area efficient on-chip hybrid voltage regulator. - Selçuk Köse; Eby G. Friedman; Simon Tarn; Sally Pinzon; Bruce McDermott (ISQED, 2012)