On Pre-Assignment Route Prototyping for Irregular Bumps on BGA Packages. - Jyun-Ru Jiang; Yun-Chih Kuo; Simon Yi-Hung Chen; Hung-Ming Chen (DATE, 2020)

Practical Substrate Design Considering Symmetrical and Shielding Routes. - Hao-Yu Chi; Simon Yi-Hung Chen; Hung-Ming Chen; Chien-Nan Liu; Yun-Chih Kuo; Ya-Hsin Chang; Kuan-Hsien Ho (DATE, 2022)

Substrate Signal Routing Solution Exploration for High-Density Packages with Machine Learning. - Yeu-Haw Yeh; Simon Yi-Hung Chen; Hung-Ming Chen; Deng-Yao Tu; Guan-Qi Fang; Yun-Chih Kuo; Po-Yang Chen (VLSI-DAT, 2022)

DPRoute: Deep Learning Framework for Package Routing. - Yeu-Haw Yeh; Simon Yi-Hung Chen; Hung-Ming Chen; Deng-Yao Tu; Guan-Qi Fang; Yun-Chih Kuo; Po-Yang Chen (ASP-DAC, 2023)

Pole-Aware Analog Layout Synthesis Considering Monotonic Current Flows and Wire Crossings. - Abhishek Patyal; Hung-Ming Chen; Mark Po-Hung Lin; Guan-Qi Fang; Simon Yi-Hung Chen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)