A flip-flop implementation for the DPA-resistant Delay-based Dual-rail Pre-charge Logic family. - Simone Bongiovanni; Mauro Olivieri; Giuseppe Scotti; Alessandro Trifiletti (MIXDES, 2013)

Security Evaluation and Optimization of the Delay-based Dual-rail Pre-charge Logic in Presence of Early Evaluation of Data. - Simone Bongiovanni; Giuseppe Scotti; Alessandro Trifiletti (SECRYPT, 2013)

Leakage Power Analysis attacks against a bit slice implementation of the Serpent block cipher. - Massimo Alioto; Simone Bongiovanni; Giuseppe Scotti; Alessandro Trifiletti (MIXDES, 2014)

Effectiveness of Leakage Power Analysis Attacks on DPA-Resistant Logic Styles Under Process Variations. - Massimo Alioto; Simone Bongiovanni; Milena Djukanovic; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Design and validation through a frequency-based metric of a new countermeasure to protect nanometer ICs from side-channel attacks. - Simone Bongiovanni; Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti (J. Cryptogr. Eng., 2015)

Univariate Power Analysis Attacks Exploiting Static Dissipation of Nanometer CMOS VLSI Circuits for Cryptographic Applications. - Davide Bellizia; Simone Bongiovanni; Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Emerg. Top. Comput., 2017)

Secure Double Rate Registers as an RTL Countermeasure Against Power Analysis Attacks. - Davide Bellizia; Simone Bongiovanni; Pietro Monsurrò; Giuseppe Scotti; Alessandro Trifiletti; Francesco Bruno Trotta (IEEE Trans. Very Large Scale Integr. Syst., 2018)

SC-DDPL: A Novel Standard-Cell Based Approach for Counteracting Power Analysis Attacks in the Presence of Unbalanced Routing. - Davide Bellizia; Simone Bongiovanni; Mauro Olivieri; Giuseppe Scotti (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)