Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program. - Ab Al-Hadi Ab Rahman; Richard Thavot; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (DASIP, 2012)

Profiling of Dataflow Programs Using Post Mortem Causation Traces. - Simone Casale Brunet; Marco Mattavelli; Jörn W. Janneck (SiPS, 2012)

Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications. - Simone Casale Brunet; Endri Bezati; Claudio Alberti; Marco Mattavelli; Edoardo Amaldi; Jörn W. Janneck (ACSSC, 2013)

Systems design space exploration by serial dataflow program execution. - Simone Casale Brunet; Marco Mattavelli; Claudio Alberti; Jörn W. Janneck (ACSSC, 2013)

Representing Guard Dependencies in Dataflow Execution Traces. - Simone Casale Brunet; Marco Mattavelli; Claudio Alberti; Jörn W. Janneck (CICSyN, 2013)

Turnus: A unified dataflow design space exploration framework for heterogeneous parallel systems. - Simone Casale Brunet; Claudio Alberti; Marco Mattavelli; Jörn W. Janneck (DASIP, 2013)

Design space exploration and implementation of RVC-CAL applications using the TURNUS framework. - Simone Casale Brunet; Endri Bezati; Claudio Alberti; Ghislain Roquier; Marco Mattavelli; Jörn W. Janneck; Jani Boutellier (DASIP, 2013)

Dataflow program analysis and refactoring techniques for design space exploration: MPEG-4 AVC/H.264 decoder implementation case study. - Ab Al-Hadi Ab Rahman; Simone Casale Brunet; Claudio Alberti; Marco Mattavelli (DASIP, 2013)

A Lego Mindstorms NXT experiment for Model Predictive Control education. - Massimo Canale; Simone Casale Brunet (ECC, 2013)

Design space exploration of high level stream programs on parallel architectures: A focus on the buffer size minimization and optimization problem. - Simone Casale Brunet; Claudio Alberti; Marco Mattavelli; Jörn W. Janneck (ISPA, 2013)

TURNUS: A design exploration framework for dataflow system design. - Simone Casale Brunet; Marco Mattavelli; Jörn W. Janneck (ISCAS, 2013)

Buffer optimization based on critical path analysis of a dataflow program design. - Simone Casale Brunet; Marco Mattavelli; Jörn W. Janneck (ISCAS, 2013)

Partitioning and optimization of high level stream applications for multi clock domain architectures. - Simone Casale Brunet; Endri Bezati; Claudio Alberti; Marco Mattavelli; Edoardo Amaldi; Jörn W. Janneck (SiPS, 2013)

Methods to explore design space for MPEG RMC codec specifications. - Simone Casale Brunet; Abdallah Elguindy; Endri Bezati; Richard Thavot; Ghislain Roquier; Marco Mattavelli; Jörn W. Janneck (Signal Process. Image Commun., 2013)

Dataflow machines. - Jörn W. Janneck; Gustav Cedersjö; Endri Bezati; Simone Casale Brunet (ACSSC, 2014)

Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control. - Simone Casale Brunet; Endri Bezati; Marco Mattavelli; Massimo Canale; Jörn W. Janneck (DASIP, 2014)

TURNUS: An open-source design space exploration framework for dynamic stream programs. - Simone Casale Brunet; M. Wiszniewska; Endri Bezati; Marco Mattavelli; Jörn W. Janneck; Massimo Canale (DASIP, 2014)

A methodology for optimizing buffer sizes of dynamic dataflow fpgas implementations. - Ab Al-Hadi Ab Rahman; Simone Casale Brunet; Claudio Alberti; Marco Mattavelli (ICASSP, 2014)

Exploring MPEG HEVC decoder parallelism for the efficient porting onto many-core platforms. - Damien de Saint Jorre; Claudio Alberti; Marco Mattavelli; Simone Casale Brunet (ICIP, 2014)

Characterizing communication behavior of dataflow programs using trace analysis. - Jörn W. Janneck; Simone Casale Brunet; Marco Mattavelli (ICSAMOS, 2014)

Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case. - Carlo Sau; Luigi Raffo; Francesca Palumbo; Endri Bezati; Simone Casale Brunet; Marco Mattavelli (ICSAMOS, 2014)

Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling. - Massimo Canale; Simone Casale Brunet; Endri Bezati; Marco Mattavelli; Jörn W. Janneck (SiPS, 2014)

Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs. - Malgorzata Michalska; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (ICCS, 2015)

High-level system synthesis and optimization of dataflow programs for MPSoCs. - Endri Bezati; Simone Casale Brunet; Marco Mattavelli; Jörn W. Janneck (ACSSC, 2016)

Trace-based manycore partitioning of stream-processing applications. - Malgorzata Michalska; Simone Casale Brunet; Endri Bezati; Marco Mattavelli; Jörn W. Janneck (ACSSC, 2016)

A Partition Scheduler Model for Dynamic Dataflow Programs. - Malgorzata Michalska; Endri Bezati; Simone Casale Brunet; Marco Mattavelli (ICCS, 2016)

Programming Models and Methods for Heterogeneous Parallel Embedded Systems. - Simone Casale Brunet; Endri Bezati; Marco Mattavelli (MCSoC, 2016)

High-Precision Performance Estimation of Dynamic Dataflow Programs. - Malgorzata Michalska; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (MCSoC, 2016)

Performance estimation of program partitions on multi-core platforms. - Malgorzata Michalska; J. J. Ahmad; Endri Bezati; Simone Casale Brunet; Marco Mattavelli (PATMOS, 2016)

High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms. - Endri Bezati; Simone Casale Brunet; Marco Mattavelli; Jörn W. Janneck (SAMOS, 2016)

Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques - Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies. - Massimo Canale; Simone Casale Brunet; Endri Bezati; Marco Mattavelli; Jörn W. Janneck (J. Signal Process. Syst., 2016)

Automated Design Flow for Multi-Functional Dataflow-Based Platforms. - Carlo Sau; Paolo Meloni; Luigi Raffo; Francesca Palumbo; Endri Bezati; Simone Casale Brunet; Marco Mattavelli (J. Signal Process. Syst., 2016)

Execution trace graph based interface synthesis of signal processing dataflow programs for heterogeneous MPSoCs. - Endri Bezati; Simone Casale Brunet; Marco Mattavelli (ACSSC, 2017)

Profiling of dynamic dataflow programs on MPSoC multi-core architectures. - Simone Casale Brunet; Endri Bezati; Aurelien Bloch; Marco Mattavelli (ACSSC, 2017)

Buffer dimensioning for throughput improvement of dynamic dataflow signal processing applications on multi-core platforms. - Malgorzata Michalska; Endri Bezati; Simone Casale Brunet; Marco Mattavelli (EUSIPCO, 2017)

High level synthesis of Smith-Waterman dataflow implementations. - Simone Casale Brunet; Endri Bezati; Marco Mattavelli (ICASSP, 2017)

Design space exploration of dataflow-based Smith-Waterman FPGA implementations. - Simone Casale Brunet; Endri Bezati; Marco Mattavelli (SiPS, 2017)

Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs. - Endri Bezati; Simone Casale Brunet; Marco Mattavelli; Jörn W. Janneck (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Towards in the Field Fast Pathogens Detection Using FPGAs. - Simone Casale Brunet; Thierry Schüpbach; Nicolas Guex; Christian Iseli; Alan J. Bridge; Dmitry Kuznetsov; Christian J. A. Sigrist; Phillippe Lemercier; Ioannis Xenarios; Endri Bezati (FPL, 2018)

Shared-variable Synchronization Approaches for Dynamic Data Flow Programs. - Apostolos Modas; Simone Casale Brunet; Robert J. Stewart 001; Endri Bezati; Junaid Jameel Ahmad; Marco Mattavelli (SiPS, 2018)

Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines. - Anatoly Prihozhy; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (SiPS, 2018)

Execution Trace Graph of Dataflow Process Networks. - Simone Casale Brunet; Marco Mattavelli (IEEE Trans. Multi Scale Comput. Syst., 2018)

High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs. - Malgorzata Michalska; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (IEEE Trans. Multi Scale Comput. Syst., 2018)

An Heterogeneous Compiler of Dataflow Programs for Zynq Platforms. - Endri Bezati; Simone Casale Brunet; Romuald Mosqueron; Marco Mattavelli (ICASSP, 2019)

Pipeline Synthesis and Optimization from Branched Feedback Dataflow Programs. - Anatoly Prihozhy; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (J. Signal Process. Syst., 2020)

Inter-actions parallel execution on GPU from high-level dataflow synthesis. - Aurelien Bloch; Simone Casale-Brunet; Marco Mattavelli (ACSCC, 2021)

Networks of Ethereum Non-Fungible Tokens: A graph-based analysis of the ERC-721 ecosystem. - Simone Casale-Brunet; Paolo Ribeca; P. Doyle; Marco Mattavelli (Blockchain, 2021)

SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis. - Aurelien Bloch; Simone Casale Brunet; Marco Mattavelli (MCSoC, 2021)

Performance Estimation of High-Level Dataflow Program on Heterogeneous Platforms. - Aurelien Bloch; Simone Casale Brunet; Marco Mattavelli (MCSoC, 2021)

Methodologies for Synthesizing and Analyzing Dynamic Dataflow Programs in Heterogeneous Systems for Edge Computing. - Aurelien Bloch; Simone Casale-Brunet; Marco Mattavelli (IEEE Open J. Circuits Syst., 2021)

A Benchmark of Entropy Coders for the Compression of Genome Sequencing Data. - Simone Casale-Brunet; Paolo Ribeca; Claudio Alberti; Unsal Ozturk; Marco Mattavelli (DCC, 2022)

MPEG-G Reference-Based Compression of Unaligned Reads Through Ultra-Fast Alignments. - Unsal Ozturk; Simone Casale-Brunet; Paolo Ribeca; Marco Mattavelli (DCC, 2022)

The impact of NFT profile pictures within social network communities. - Simone Casale-Brunet; Mirko Zichichi; Lee Hutchinson; Marco Mattavelli; Stefano Ferretti (GoodIT, 2022)

Unveiling social aggregation in the Decentraland metaverse platform. - Junliang Luo; Simone Casale-Brunet; Barbara Guidi; Marco Mattavelli; Xue Liu 001 (GoodIT, 2023)

Exploring the data of blockchain-based metaverses. - Simone Casale Brunet; Marco Mattavelli; Leonardo Chiariglione (MetaCom, 2023)

Secure-by-design smart contract based on dataflow implementations. - Simone Casale-Brunet; Marco Mattavelli (CoRR, 2023)

Design Space Exploration for Partitioning Dataflow Program on CPU-GPU Heterogeneous System. - Aurelien Bloch; Simone Casale-Brunet; Marco Mattavelli (J. Signal Process. Syst., 2023)

Efficient Neural Clustering and Compression of Strings Through Approximate Euclidean Embeddings of the Levenshtein Distance. - Ünsal Öztürk; Utku Görkem Ertürk; Simone Casale-Brunet; Paolo Ribeca; Marco Mattavelli (DCC, 2024)