A new adaptive PLL to reduce the lock time in 0.18µm technology. - Mehdi Ghasemzadeh; Sina Mahdavi; Abolfazl Zokaei; Khayrollah Hadidi (MIXDES, 2016)

A new ultra high speed 5-2 compressor with a new structure. - Mehdi Ghasemzadeh; Sina Mahdavi; Abolfazl Zokaei; Khayrollah Hadidi (MIXDES, 2016)

A 800MS/s, 150µV input-referred offset single-stage latched comparator. - Sarang Kazeminia; Sina Mahdavi (MIXDES, 2016)

Bulk controlled offset cancellation mechanism for single-stage latched comparator. - Sarang Kazeminia; Sina Mahdavi; Reza Gholamnejad (MIXDES, 2016)

Digitally-assisted offset cancellation technique for open loop residue amplifiers in high-resolution and high-speed ADCs. - Sarang Kazeminia; Sina Mahdavi; Khayrollah Hadidi (MIXDES, 2016)

A new current mode min-max circuit using CMOS technology for fuzzy applications. - Ramin Khayatzadeh; Mehdi Ghasemzadeh; Sina Mahdavi (MIXDES, 2016)

A new fast rail-to-rail continuous-time common-mode feedback circuit. - Sina Mahdavi; Faeze Noruzpur; Esmaii Ghadimi; Tohid Moradi Khanshan (MIXDES, 2017)

A novel APS pixel level rearrangement to increase the fill factor and SNR in 0.35μm CMOS technology. - Ali Baradaran Rezaeii; Faeze Noruzpur; Sina Mahdavi (MIXDES, 2017)

A New Semi-Digital Low Power Low Jitter and Fast PLL in 0.18μm Technology. - Faeze Noruzpur; Sina Mahdavi; Maryam Poreh; Shima Tayyeb Ghasemi (MIXDES, 2018)