Physical Synthesis for Advanced Neural Network Processors. - Zhuolun He; Peiyu Liao; Siting Liu 002; Yuzhe Ma; Yibo Lin; Bei Yu 001 (ASP-DAC, 2021)

Attacking a CNN-based Layout Hotspot Detector Using Group Gradient Method. - Haoyu Yang; Shifan Zhang; Kang Liu 017; Siting Liu 002; Benjamin Tan 001; Ramesh Karri; Siddharth Garg; Bei Yu 001; Evangeline F. Y. Young (ASP-DAC, 2021)

Global Placement with Deep Learning-Enabled Explicit Routability Optimization. - Siting Liu 002; Qi Sun 002; Peiyu Liao; Yibo Lin; Bei Yu 001 (DATE, 2021)

Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design. - Qi Sun 002; Tinghuan Chen; Siting Liu 002; Jin Miao; Jianli Chen; Hao Yu 001; Bei Yu 001 (DATE, 2021)

DREAMPlace 4.0: Timing-driven Global Placement with Momentum-based Net Weighting. - Peiyu Liao; Siting Liu 002; Zhitang Chen; Wenlong Lv; Yibo Lin; Bei Yu 001 (DATE, 2022)

FastGR: Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler. - Siting Liu 002; Peiyu Liao; Rui Zhang; Zhitang Chen; Wenlong Lv; Yibo Lin; Bei Yu 001 (DATE, 2022)

Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design. - Qi Sun 002; Tinghuan Chen; Siting Liu 002; Jianli Chen; Hao Yu 001; Bei Yu 001 (ACM Trans. Design Autom. Electr. Syst., 2022)

Concurrent Sign-off Timing Optimization via Deep Steiner Points Refinement. - Siting Liu 002; Ziyi Wang 010; Fangzhou Liu; Yibo Lin; Bei Yu 001; Martin D. F. Wong (DAC, 2023)

Restructure-Tolerant Timing Prediction via Multimodal Fusion. - Ziyi Wang 010; Siting Liu 002; Yuan Pu 001; Song Chen 001; Tsung-Yi Ho; Bei Yu 001 (DAC, 2023)

Mitigating Distribution Shift for Congestion Optimization in Global Placement. - Su Zheng; Lancheng Zou; Siting Liu 002; Yibo Lin; Bei Yu 001; Martin D. F. Wong (DAC, 2023)

FastGR: Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler (Extended Abstract). - Siting Liu 002; Yuan Pu 001; Peiyu Liao; Hongzhong Wu; Rui Zhang; Zhitang Chen; Wenlong Lv; Yibo Lin; Bei Yu 001 (IJCAI, 2023)

FastGR: Global Routing on CPU-GPU With Heterogeneous Task Graph Scheduler. - Siting Liu 002; Yuan Pu 001; Peiyu Liao; Hongzhong Wu; Rui Zhang; Zhitang Chen; Wenlong Lv; Yibo Lin; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

DREAMPlace 4.0: Timing-Driven Placement With Momentum-Based Net Weighting and Lagrangian-Based Refinement. - Peiyu Liao; Dawei Guo; Zizheng Guo; Siting Liu 002; Yibo Lin; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs. - Siting Liu 002; Jiaxi Jiang; Zhuolun He; Ziyi Wang 010; Yibo Lin; Bei Yu 001; Martin D. F. Wong (ISPD, 2024)

Analytical Heterogeneous Die-to-Die 3D Placement with Macros. - Yuxuan Zhao 001; Peiyu Liao; Siting Liu 002; Jiaxi Jiang; Yibo Lin; Bei Yu 001 (CoRR, 2024)

ThePlace: Thermal-Aware Placement With Operator Learning-Based Ultra-Fast Simulator. - Xinfei Liu; Siting Liu 002; Bei Yu 001; Song Chen 001; Qi Xu (ASP-DAC, 2025)

Analytical Heterogeneous Die-to-Die 3-D Placement With Macros. - Yuxuan Zhao 001; Peiyu Liao; Siting Liu 002; Jiaxi Jiang; Yibo Lin; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Sign-Off Timing Considerations via Concurrent Routing Topology Optimization. - Siting Liu 002; Ziyi Wang 010; Fangzhou Liu; Yibo Lin; Bei Yu 001; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction. - Lancheng Zou; Su Zheng; Peng Xu; Siting Liu 002; Bei Yu 001; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)