Herbrand Automata for Hardware Verification. - Werner Damm; Amir Pnueli; Sitvanit Ruah (CONCUR, 1998)

Parameterized Verification with Automatically Computed Inductive Assertions. - Tamarah Arons; Amir Pnueli; Sitvanit Ruah; Jiazhao Xu; Lenore D. Zuck (CAV, 2001)

Automatic Deductive Verification with Invisible Invariants. - Amir Pnueli; Sitvanit Ruah; Lenore D. Zuck (TACAS, 2001)

On the Decisional Complexity of Problems Over the Reals. - Moni Naor; Sitvanit Ruah (Inf. Comput., 2001)

The Safety Simple Subset. - Shoham Ben-David; Dana Fisman; Sitvanit Ruah (Haifa Verification Conference, 2005)

Main Results of PROSYD - Methodologies and Tools for Writing Reusable PSL Assertions. - Sitvanit Ruah (FDL, 2006)

Temporal Antecedent Failure: Refining Vacuity. - Shoham Ben-David; Dana Fisman; Sitvanit Ruah (CONCUR, 2007)

Embedding finite automata within regular expressions. - Shoham Ben-David; Dana Fisman; Sitvanit Ruah (Theor. Comput. Sci., 2008)

Analyzing the behavior of event processing applications. - Ella Rabinovich; Opher Etzion; Sitvanit Ruah; Sarit Archushin (DEBS, 2010)

Verification of software changes with ExpliSAT. - Hana Chockler; Sitvanit Ruah (HotSWUp, 2012)

Improving Representative Computation in ExpliSAT. - Hana Chockler; Dmitry Pidan; Sitvanit Ruah (Haifa Verification Conference, 2013)

Lightweight Static Analysis Check of Upgrades in C/C++ Software. - Hana Chockler; Sitvanit Ruah (Validation of Evolving Software, 2015)

Vacuity in practice: temporal antecedent failure. - Shoham Ben-David; Fady Copty; Dana Fisman; Sitvanit Ruah (Formal Methods Syst. Des., 2015)