CAMs as Synchronizing Caches for Multithreaded Irregular Applications on FPGAs. - Skyler Windh; Prerna Budhkar; Walid A. Najjar (ICCAD, 2015)

An open-source compiler and PCB synthesis tool for digital microfluidic biochips. - Daniel T. Grissom; Christopher Curtis; Skyler Windh; Calvin Phung; Navin Kumar; Zachary Zimmerman; Kenneth O'Neal; Jeffrey McDaniel; Nick Liao; Philip Brisk (Integr., 2015)

High-Level Language Tools for Reconfigurable Computing. - Skyler Windh; Xiaoyin Ma; Robert J. Halstead; Prerna Budhkar; Zabdiel Luna; Omar Hussaini; Walid A. Najjar (Proc. IEEE, 2015)

FPGA-accelerated group-by aggregation using synchronizing caches. - Ildar Absalyamov; Prerna Budhkar; Skyler Windh; Robert J. Halstead; Walid A. Najjar; Vassilis J. Tsotras (DaMoN, 2016)

Performance Improvements and Congestion Reduction for Routing-Based Synthesis for Digital Microfluidic Biochips. - Skyler Windh; Calvin Phung; Daniel T. Grissom; Paul Pop; Philip Brisk (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Hashing, Caching, and Synchronization: Memory Techniques for Latency Masking Multithreaded Applications. - Skyler Windh (2018)

Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads. - Prerna Budhkar; Ildar Absalyamov; Vasileios Zois; Skyler Windh; Walid A. Najjar; Vassilis J. Tsotras (ACM Trans. Archit. Code Optim., 2019)

Efficient local locking for massively multithreaded in-memory hash-based operators. - Bashar Romanous; Skyler Windh; Ildar Absalyamov; Prerna Budhkar; Robert J. Halstead; Walid A. Najjar; Vassilis J. Tsotras (VLDB J., 2021)

Reinforcement Learning Approach for Mapping Applications to Dataflow-Based Coarse-Grained Reconfigurable Array. - Andre Xian Ming Chang; Parth Khopkar; Bashar Romanous; Abhishek Chaurasia; Patrick Estep; Skyler Windh; Doug Vanesko; Sheik Dawood Beer Mohideen; Eugenio Culurciello (CoRR, 2022)