Real-time Handel-C Based Implementation of DV Decoder. - Marek Gorgon; Slawomir Cichon; Miroslaw Pac (FPL, 2005)

Handel-C Design Enhancement for FPGA-Based DV Decoder. - Slawomir Cichon; Marek Gorgon; Miroslaw Pac (ARC, 2006)

FPGA-based DVCPRO HD Decoder Implementation Using Impulse C. - Slawomir Cichon; Marek Gorgon (Comput. Sci., 2013)

H.265 Inverse Transform FPGA implementation in Impulse C. - Slawomir Cichon; Marek Gorgon (FedCSIS, 2017)