A 10nm SRAM Design using Gate-Modulated Self-Collapse Write Assist Enabling 175mV VMIN Reduction with Negligible Power Overhead. - Zheng Guo; Jami Wiedemer; Yusung Kim 002; Prithvee Sundararajan Ramamoorthy; Prateeksha Bindiganavile Sathyaprasad; Smita Shridharan; Daeyeon Kim; Eric Karl (VLSI Circuits, 2020)