An Efficient Hardware-Based Multi-hash Scheme for High Speed IP Lookup. - Socrates Demetriades; Michel Hanna; Sangyeun Cho; Rami G. Melhem (Hot Interconnects, 2008)

TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation. - Sangyeun Cho; Socrates Demetriades; Shayne Evans; Lei Jin 002; Hyunjin Lee; Kiyeon Lee; Michael Moeng (ICPP, 2008)

Progressive hashing for packet processing using set associative memory. - Michel Hanna; Socrates Demetriades; Sangyeun Cho; Rami G. Melhem (ANCS, 2009)

CHAP: Enabling Efficient Hardware-Based Multiple Hash Schemes for IP Lookup. - Michel Hanna; Socrates Demetriades; Sangyeun Cho; Rami G. Melhem (Networking, 2009)

Two-phase trace-driven simulation (TPTS): a fast multicore processor architecture simulation approach. - Hyunjin Lee; Lei Jin 002; Kiyeon Lee; Socrates Demetriades; Michael Moeng; Sangyeun Cho (Softw. Pract. Exp., 2010)

MAESTRO: Orchestrating predictive resource management in future multicore systems. - Sangyeun Cho; Socrates Demetriades (AHS, 2011)

BarrierWatch: characterizing multithreaded workloads across and within program-defined epochs. - Socrates Demetriades; Sangyeun Cho (Conf. Computing Frontiers, 2011)

Advanced hashing schemes for packet forwarding using set associative memory architectures. - Michel Hanna; Socrates Demetriades; Sangyeun Cho; Rami G. Melhem (J. Parallel Distributed Comput., 2011)

Predicting Coherence Communication by Tracking Synchronization Points at Run Time. - Socrates Demetriades; Sangyeun Cho (MICRO, 2012)

Stash directory: A scalable directory for many-core coherence. - Socrates Demetriades; Sangyeun Cho (HPCA, 2014)