Thermal resistance measurements of interconnections for a three-dimensional (3D) chip stack. - Keiji Matsumoto; Soichiro Ibaraki; Katsuyuki Sakuma; Fumiaki Yamada (3DIC, 2009)

Thermal design guideline and new cooling solution for a three-dimensional (3D) chip stack. - Keiji Matsumoto; Soichiro Ibaraki; Kuniaki Sueoka; Katsuyuki Sakuma; Hidekazu Kikuchi; Hiroyuki Mori; Yasumitsu Orii; Fumiaki Yamada; Kohei Fujihara; Junichi Takamatsu; Koji Kondo (3DIC, 2013)