Experimental Evaluation of Different Realizations of Recursive CIC Filters. - S. M. Mortazavi Zanjani; Somayyeh Rahimian Omam; Seid Mehdi Fakhraie; Omid Shoaei (CCECE, 2006)

Design Guidelines for Two-Stage Cascode-Compensated Operational Amplifiers. - Hamed Aminzadeh; Reza Lotfi; Somayyeh Rahimian (ICECS, 2006)

Implementation of Multiplier Block with Reduced Adder Cost. - Somayyeh Rahimian Omam; S. M. Mortazavi Zanjani; Sied Mehdi Fakhraie; Omid Shoaei (ICECS, 2006)

Implementation and Synthesis of a Sorting Network. - Navid Zeraatkar; Ali Tavanaie; Reza Talebian; Somayyeh Rahimian (ICECS, 2006)

Minimizing the adder cost in multiple constant multipliers. - Somayyeh Rahimian Omam; Seid Mehdi Fakhraie; Omid Shoaei (IEICE Electron. Express, 2006)

Design of Resonant Clock Distribution Networks for 3-D Integrated Circuits. - Somayyeh Rahimian; Vasilis F. Pavlidis; Giovanni De Micheli (PATMOS, 2011)

Inter-Plane Communication Methods for 3-D ICs. - Somayyeh Rahimian; Vasilis F. Pavlidis; Giovanni De Micheli (J. Low Power Electron., 2012)

An Enhanced Design Methodology for Resonant Clock Trees. - Somayyeh Rahimian; Vasilis F. Pavlidis; Xifan Tang; Giovanni De Micheli (J. Low Power Electron., 2013)

Parallel vs. serial inter-plane communication using TSVs. - Somayyeh Rahimian Omam; Yusuf Leblebici; Giovanni De Micheli (LASCAS, 2014)

A ultra-low-power FPGA based on monolithically integrated RRAMs. - Pierre-Emmanuel Gaillardon; Xifan Tang; Jury Sandrini; Maxime Thammasack; Somayyeh Rahimian Omam; Davide Sacchetto; Yusuf Leblebici; Giovanni De Micheli (DATE, 2015)

A study on buffer distribution for RRAM-based FPGA routing structures. - Somayyeh Rahimian Omam; Xifan Tang; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (LASCAS, 2015)