Path-Delay Constrained Floorplanning: A Mathematical Programming Approach for Initial Placement. - Somchai Prasitjutrakul; William J. Kubitz (DAC, 1989)

A Timing-Driven Global Router for Custom Chip Design. - Somchai Prasitjutrakul; William J. Kubitz (ICCAD, 1990)

Performance-driven chip floorplanning and global routing - Somchai Prasitjutrakul (1991)

A performance-driven global router for custom VLSI chip design. - Somchai Prasitjutrakul; William J. Kubitz (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992)