Superscalar Execution with Direct Data Forwarding. - Soner Önder; Rajiv Gupta 001 (IEEE PACT, 1998)

Automatic Generation of Microarchitecture Simulators. - Soner Önder; Rajiv Gupta 001 (ICCL, 1998)

Caching and Predicting Branch Sequences for Improved Fetch Effectiveness. - Soner Önder; Jun Xu; Rajiv Gupta 001 (IEEE PACT, 1999)

Instruction Wake-Up in Wide Issue Superscalars. - Soner Önder; Rajiv Gupta 001 (Euro-Par, 2001)

Load and store reuse using register file contents. - Soner Önder; Rajiv Gupta 001 (ICS, 2001)

Cost Effective Memory Dependence Prediction using Speculation Levels and Color Sets. - Soner Önder (IEEE PACT, 2002)

Optimizing Static Power Dissipation by Functional Units in Superscalar Processors. - Siddharth Rele; Santosh Pande; Soner Önder; Rajiv Gupta 001 (CC, 2002)

Dynamic Memory Disambiguation in the Presence of Out-of-order Store Issuing. - Soner Önder; Rajiv Gupta 001 (J. Instr. Level Parallelism, 2002)

Reuse-distance-based miss-rate prediction on a per instruction basis. - Changpeng Fang; Steve Carr 001; Soner Önder; Zhenlin Wang (Memory System Performance, 2004)

Specification of Intel IA-32 Using an Architecture Description Language. - Jeff Bastian; Soner Önder (IFIP-WADL, 2004)

Instruction Based Memory Distance Analysis and its Application. - Changpeng Fang; Steve Carr 001; Soner Önder; Zhenlin Wang (IEEE PACT, 2005)

A case for a working-set-based memory hierarchy. - Steve Carr 001; Soner Önder (Conf. Computing Frontiers, 2005)

Fast branch misprediction recovery in out-of-order superscalar processors. - Peng Zhou; Soner Önder; Steve Carr 001 (ICS, 2005)

Path-Based Reuse Distance Analysis. - Changpeng Fang; Steve Carr 001; Soner Önder; Zhenlin Wang (CC, 2006)

Feedback-directed memory disambiguation through store distance analysis. - Changpeng Fang; Steve Carr 001; Soner Önder; Zhenlin Wang (ICS, 2006)

Improving single-thread performance with fine-grain state maintenance. - Peng Zhou; Soner Önder (Conf. Computing Frontiers, 2008)

Unrestricted Code Motion: A Program Representation and Transformation Algorithms Based on Future Values. - Shuhan Ding; Soner Önder (CC, 2010)

A First-Order Logic Based Framework for Verifying Simulations. - Hui Meen Nyew; Nilufer Onder; Soner Önder; Zhenlin Wang (AAAI, 2013)

Single Assignment Compiler, Single Assignment Architecture: Future Gated Single Assignment Form*; Static Single Assignment with Congruence Classes. - Shuhan Ding; John Earnest; Soner Önder (CGO, 2014)

Verifying micro-architecture simulators using event traces. - Hui Meen Nyew; Nilufer Onder; Soner Önder; Zhenlin Wang (ICS, 2014)

Mower: A New Design for Non-blocking Misprediction Recovery. - Zhaoxiang Jin; Görkem Asilioglu; Soner Önder (ICS, 2015)

LaZy superscalar. - Görkem Asilioglu; Zhaoxiang Jin; Murat Köksal; Omkar Javeri; Soner Önder (ISCA, 2015)

A two-phase recovery mechanism. - Zhaoxiang Jin; Soner Önder (ICS, 2018)

Dynamic Memory Dependence Predication. - Zhaoxiang Jin; Soner Önder (ISCA, 2018)

Decoupling address generation from loads and stores to improve data access energy efficiency. - Michael Stokes; Ryan Baird; Zhaoxiang Jin; David B. Whalley; Soner Önder (LCTES, 2018)

Improving Energy Efficiency by Memoizing Data Access Information. - Michael Stokes; Ryan Baird; Zhaoxiang Jin; David B. Whalley; Soner Önder (ISLPED, 2019)

Decreasing the Miss Rate and Eliminating the Performance Penalty of a Data Filter Cache. - Michael Stokes; David B. Whalley; Soner Önder (ACM Trans. Archit. Code Optim., 2021)

Facilitating the Bootstrapping of a New ISA. - Abigail Mortensen; Scott Pomerville; David B. Whalley; Soner Önder; Gang-Ryung Uh (LCTES, 2023)