RaQu: An automatic high-utilization CNN quantization and mapping framework for general-purpose RRAM Accelerator. - Songyun Qu; Bing Li 017; Ying Wang 001; Dawen Xu 002; Xiandong Zhao; Lei Zhang 008 (DAC, 2020)

ASBP: Automatic Structured Bit-Pruning for RRAM-based NN Accelerator. - Songyun Qu; Bing Li 017; Ying Wang 001; Lei Zhang 008 (DAC, 2021)

InfoX: an energy-efficient ReRAM accelerator design with information-lossless low-bit ADCs. - Yintao He; Songyun Qu; Ying Wang 001; Bing Li 017; Huawei Li 001; Xiaowei Li 001 (DAC, 2022)

Processing-in-SRAM acceleration for ultra-low power visual 3D perception. - Yuquan He; Songyun Qu; Gangliang Lin; Cheng Liu 008; Lei Zhang 008; Ying Wang 001 (DAC, 2022)

CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures. - Kaiwei Zou; Ying Wang 001; Long Cheng 003; Songyun Qu; Huawei Li 001; Xiaowei Li 001 (IEEE Trans. Computers, 2022)

An Automated Quantization Framework for High-Utilization RRAM-Based PIM. - Bing Li 017; Songyun Qu; Ying Wang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

ENASA: Towards Edge Neural Architecture Search based on CIM acceleration. - Shixin Zhao; Songyun Qu; Ying Wang 001; Yinhe Han 001 (DATE, 2023)

Communication-aware Quantization for Deep Learning Inference Parallelization on Chiplet-based Accelerators. - Kaiwei Zou; Songyun Qu; Wen Li; Ying Wang 001; Huawei Li 001; Yongpan Liu (ICPADS, 2023)

A Coordinated Model Pruning and Mapping Framework for RRAM-Based DNN Accelerators. - Songyun Qu; Bing Li 017; Shixin Zhao; Lei Zhang 008; Ying Wang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators. - Songyun Qu; Shixin Zhao; Bing Li 017; Yintao He; Xuyi Cai; Lei Zhang 008; Ying Wang 001 (ASPLOS (2), 2024)

Bit-Trimmer: Ineffectual Bit-Operation Removal for CLM Architecture. - Yintao He; Shixin Zhao; Songyun Qu; Huawei Li 001; Xiaowei Li 001; Ying Wang 001 (DATE, 2024)