A scalable high-frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design. - Sorin P. Voinigescu; Michael C. Maliepaard; Jonathan L. Showell; Greg E. Babcock; David Marchesan; Michael Schröter; Peter Schvan; David L. Harame (IEEE J. Solid State Circuits, 1997)

Circuits and technologies for highly integrated optical networking ICs at 10 Gb/s to 40 Gb/s. - Sorin P. Voinigescu; P. Popescu; P. Banens; Miles Copeland; G. Fortier; K. Howlett; M. Herod; David Marchesan; Jonathan L. Showell; S. Sziiagyi; Hai Tran; J. Weng (CICC, 2001)

A 3-V fully differential distributed limiting driver for 40-Gb/s optical transmission systems. - Douglas S. McPherson; Florin Pera; Mihai Tazlauanu; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2003)

A 1.5V 20/30 Gb/s CMOS backplane driver with digital pre-emphasis. - Paul Westergaard; Timothy O. Dickson; Sorin P. Voinigescu (CICC, 2004)

An inductor-based 52-GHz 0.18 μm SiGe HBT cascode LNA with 22 dB gain. - Michael Gordon; Sorin P. Voinigescu (ESSCIRC, 2004)

6-kΩ 43-Gb/s differential transimpedance-limiting amplifier with auto-zero feedback and high dynamic range. - Hai Tran; Florin Pera; Douglas S. McPherson; Dorin Viorel; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2004)

Correction to "6-k$Omega$43-Gb/s Differential Transimpedance-Limiting Amplifier With Auto-Zero Feedback and High Dynamic Range". - Hai Tran; FlorinPera Pera; Douglas S. McPherson; Dorin Viorel; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2004)

Algorithmic design methodologies and design porting of wireline transceiver IC building blocks between technology nodes. - Sorin P. Voinigescu; Timothy O. Dickson; Theodoros Chalvatzis; Altan Hazneci; Ekaterina Laskin; Rudy Beerkens; Imran Khalid; Edward S. Rogers Sr. (CICC, 2005)

System-on-Chip Design beyond 50 GHz, invited. - Sorin P. Voinigescu; Michael Gordon 001; Chihou Lee; Terry Yao; Alain M. Mangan; Kenneth H. K. Yau (IWSOC, 2005)

A 2.5-V 45-Gb/s decision circuit using SiGe BiCMOS logic. - Timothy O. Dickson; Rudy Beerkens; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2005)

An 80-Gb/s 231-1 pseudorandom binary sequence generator in SiGe BiCMOS technology. - Timothy O. Dickson; Ekaterina Laskin; Imran Khalid; Rudy Beerkens; Jingqiong Xie; Boris Karajica; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2005)

A 30-GS/sec Track and Hold Amplifier in 0.13-μm CMOS Technology. - Shahriar Shahramian; Sorin P. Voinigescu; Anthony Chan Carusone (CICC, 2006)

The Invariance of Characteristic Current Densities in Nanoscale MOSFETs and Its Impact on Algorithmic Design Methodologies and Design Porting of Si(Ge) (Bi)CMOS High-Speed Building Blocks. - Timothy O. Dickson; Kenneth H. K. Yau; Theodoros Chalvatzis; Alain M. Mangan; Ekaterina Laskin; Rudy Beerkens; Paul Westergaard; Mihai Tazlauanu; Ming-Ta Yang; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2006)

A 1-Tap 40-Gb/s Look-Ahead Decision Feedback Equalizer in 0.18-$muhbox m$SiGe BiCMOS Technology. - Adesh Garg; Anthony Chan Carusone; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2006)

A 60 mW per Lane, 4$, times, $23-Gb/s 2$ ^7 -$1 PRBS Generator. - Ekaterina Laskin; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2006)

Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18-$muhbox m$SiGe BiCMOS Technology. - Shahriar Shahramian; Anthony Chan Carusone; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2006)

65-nm CMOS, W-Band Receivers for Imaging Applications. - Keith W. Tang; Mehdi Khanpour; Patrice Garcia; Christophe Gamier; Sorin P. Voinigescu (CICC, 2007)

Towards a sub-2.5V, 100-Gb/s Serial Transceiver. - Sorin P. Voinigescu; Ricardo Andres Aroca; Timothy O. Dickson; Sean T. Nicolson; Theodoros Chalvatzis; Pascal Chevalier 002; Patrice Garcia; Christophe Gamier; Bernard Sautreuil (CICC, 2007)

Design for millimeter-wave applications in silicon technologies. - Andreia Cathelin; Baudouin Martineau; N. Seller; S. Douyere; Jean Gorisse; Sébastien Pruvost; Christine Raynaud; Frederic Gianesello; Sébastien Montusclat; Sorin P. Voinigescu; Ali M. Niknejad; Didier Belot; et al. (ESSCIRC, 2007)

CMOS SOCs at 100 GHz: System Architectures, Device Characterization, and IC Design Examples. - Sorin P. Voinigescu; Sean T. Nicolson; Mehdi Khanpour; Keith K. W. Tang; Kenneth H. K. Yau; N. Seyedfathi; A. Timonov; A. Nachman; George V. Eleftheriades; Peter Schvan; Ming-Ta Yang (ISCAS, 2007)

A Low-Noise 40-GS/s Continuous-Time Bandpass ΔΣ ADC Centered at 2 GHz for Direct Sampling Receivers. - Theodoros Chalvatzis; Eric Gagnon; Morris Repeta; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2007)

Low-Voltage Topologies for 40-Gb/s Circuits in Nanoscale CMOS. - Theodoros Chalvatzis; Kenneth H. K. Yau; Ricardo Andres Aroca; Peter Schvan; Ming-Ta Yang; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2007)

Low-Power Circuits for a 2.5-V, 10.7-to-86-Gb/s Serial Transmitter in 130-nm SiGe BiCMOS. - Timothy O. Dickson; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2007)

Design and Scaling of W-Band SiGe BiCMOS VCOs. - Sean T. Nicolson; Kenneth H. K. Yau; Pascal Chevalier 002; Alain Chantre; Bernard Sautreuil; Keith W. Tang; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2007)

Algorithmic Design of CMOS LNAs and PAs for 60-GHz Radio. - Terry Yao; Michael Q. Gordon; Keith K. W. Tang; Kenneth H. K. Yau; Ming-Ta Yang; Peter Schvan; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2007)

Will BiCMOS stay competitive for mmW applications ? - Patrice Garcia; Alain Chantre; Sébastien Pruvost; Pascal Chevalier 002; Sean T. Nicolson; David Roy 001; Sorin P. Voinigescu; Christophe Garnier (CICC, 2008)

A zero-IF 60GHz transceiver in 65nm CMOS with ≫ 3.5Gb/s links. - Alexander Tomkins; Ricardo Andres Aroca; Takuji Yamamoto; Sean T. Nicolson; Yoshiyasu Doi; Sorin P. Voinigescu (CICC, 2008)

A 95GHz Receiver with Fundamental-Frequency VCO and Static Frequency Divider in 65nm Digital CMOS. - Ekaterina Laskin; Mehdi Khanpour; Ricardo Andres Aroca; Keith K. W. Tang; Patrice Garcia; Sorin P. Voinigescu (ISSCC, 2008)

A Large Swing, 40-Gb/s SiGe BiCMOS Driver With Adjustable Pre-Emphasis for Data Transmission Over 75Ω Coaxial Cable. - Ricardo Andres Aroca; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2008)

A Wideband W-Band Receiver Front-End in 65-nm CMOS. - Mehdi Khanpour; Keith W. Tang; Patrice Garcia; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2008)

165-GHz Transceiver in SiGe Technology. - Ekaterina Laskin; Pascal Chevalier 002; Alain Chantre; Bernard Sautreuil; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2008)

Single-Chip W-band SiGe HBT Transceivers and Receivers for Doppler Radar and Millimeter-Wave Imaging. - Sean T. Nicolson; Pascal Chevalier 002; Bernard Sautreuil; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2008)

0.13µm SiGe BiCMOS Technology Fully Dedicated to mm-Wave Applications. - Grégory Avenier; Malick Diop; Pascal Chevalier 002; Germaine Troillard; Nicolas Loubet; Julien Bouvier; Linda Depoyan; Nicolas Derrier; Michel Buczko; Cédric Leyris; Samuel Boret; Sébastien Montusclat; et al. (IEEE J. Solid State Circuits, 2009)

A 1 GHz Bandwidth Low-Pass ΔΣADC With 20-50 GHz Adjustable Sampling Rate. - Adam Hart; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2009)

A 35-GS/s, 4-Bit Flash ADC With Active Data and Clock Distribution Trees. - Shahriar Shahramian; Sorin P. Voinigescu; Anthony Chan Carusone (IEEE J. Solid State Circuits, 2009)

A Zero-IF 60 GHz 65 nm CMOS Transceiver With Direct BPSK Modulation Demonstrating up to 6 Gb/s Data Rates Over a 2 m Wireless Link. - Alexander Tomkins; Ricardo Andres Aroca; Takuji Yamamoto; Sean T. Nicolson; Yoshiyasu Doi; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2009)

An 18-Gb/s, Direct QPSK Modulation SiGe BiCMOS Transceiver for Last Mile Links in the 70-80 GHz Band. - Ioannis Sarkas; Sean T. Nicolson; Alexander Tomkins; Ekaterina Laskin; Pascal Chevalier 002; Bernard Sautreuil; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2010)

A Passive W-Band Imaging Receiver in 65-nm Bulk CMOS. - Alexander Tomkins; Patrice Garcia; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2010)

A 2.4-Vpp 60-Gb/s CMOS Driver With Digitally Variable Amplitude and Pre-Emphasis Control at Multiple Peaking Frequencies. - Ricardo Andres Aroca; Peter Schvan; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2011)

Design of a Dual W- and D-Band PLL. - Shahriar Shahramian; Adam Hart; Alexander Tomkins; Anthony Chan Carusone; Patrice Garcia; Pascal Chevalier 002; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2011)

A 45nm SOI CMOS Class-D mm-Wave PA with >10Vpp differential swing. - Ioannis Sarkas; Andreea Balteanu; Eric Dacquay; Alexander Tomkins; Sorin P. Voinigescu (ISSCC, 2012)

A 2-Bit, 24 dBm, Millimeter-Wave SOI CMOS Power-DAC Cell for Watt-Level High-Efficiency, Fully Digital m-ary QAM Transmitters. - Andreea Balteanu; Ioannis Sarkas; Eric Dacquay; Alexander Tomkins; Gabriel M. Rebeiz; Peter M. Asbeck; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2013)

A Study of SiGe HBT Signal Sources in the 220-330-GHz Range. - Sorin P. Voinigescu; Alexander Tomkins; Eric Dacquay; Pascal Chevalier 002; Jürgen Hasch; Alain Chantre; Bernard Sautreuil (IEEE J. Solid State Circuits, 2013)

A High Modulation Bandwidth, 110 GHz Power-DAC Cell for IQ Transmitter Arrays With Direct Amplitude and Phase Modulation. - Andreea Balteanu; Stefan Shopov; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2014)

A 19 dBm, 15 Gbaud, 9 bit SOI CMOS Power-DAC Cell for High-Order QAM W-Band Transmitters. - Stefan Shopov; Andreea Balteanu; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2014)

A 3×40Gb/s 28nm FDSOI CMOS front-end array with 10mVPP sensitivity and >4VPP output swing. - Stefan Shopov; Sorin P. Voinigescu (ESSCIRC, 2015)

Analog Circuit Blocks for 80-GHz Bandwidth Frequency-Interleaved, Linear, Large-Swing Front-Ends. - James Hoffman; Jean-Roland Martin-Gosse; Stefan Shopov; Jack J. Pekarik; Renata Camillo-Castillo; Vibhor Jain; David L. Harame; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2016)

55-nm SiGe BiCMOS Distributed Amplifier Topologies for Time-Interleaved 120-Gb/s Fiber-Optic Receivers and Transmitters. - James Hoffman; Stefan Shopov; Pascal Chevalier 002; Andreia Cathelin; Peter Schvan; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2016)

A 234-261-GHz 55-nm SiGe BiCMOS Signal Source with 5.4-7.2 dBm Output Power, 1.3% DC-to-RF Efficiency, and 1-GHz Divided-Down Output. - Stefan Shopov; Andreea Balteanu; Jürgen Hasch; Pascal Chevalier 002; Andreia Cathelin; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2016)

A 3×60Gb/s Transmitter/Repeater Front-End With 4.3VPP Single-Ended Output Swing in a 28nm UTBB FD-SOI Technology. - Stefan Shopov; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2016)

A 13.2-dBm, 138-GHz I/Q RF-DAC with 64-QAM and OFDM free-space constellation formation. - Stefan Shopov; Ozan D. Gurbuz; Gabriel M. Rebeiz; Sorin P. Voinigescu (ESSCIRC, 2017)

A 44Gbps high extinction ratio silicon Mach-Zehnder modulator with a 3D-integrated 28nm FD-SOI CMOS driver. - Zheng Yong; Stefan Shopov; Jared C. Mikkelsen; Robert Mallard; Jason C. C. Mak; Sorin P. Voinigescu; Joyce K. S. Poon (OFC, 2017)

Introduction to the Special Section on the 2016 IEEE BCTM and IEEE CSICS. - Bodhisatwa Sadhu; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2017)

SiGe HBT Technology: Future Trends and TCAD-Based Roadmap. - Michael Schröter; Tommy Rosenbaum; Pascal Chevalier 002; Bernd Heinemann; Sorin P. Voinigescu; Ed Preisler; Josef Böck; Anindya Mukherjee (Proc. IEEE, 2017)

Silicon Millimeter-Wave, Terahertz, and High-Speed Fiber-Optic Device and Benchmark Circuit Scaling Through the 2030 ITRS Horizon. - Sorin P. Voinigescu; Stefan Shopov; James Bateman; Hassan Farooq; James Hoffman; Konstantinos Vasilakopoulos (Proc. IEEE, 2017)

Large-Swing 22nm Si/SiGe FDSOI Stacked Cascodes for 56GBaud Drivers and 5G PAs. - M. Sadeah Dadash; David Harame; Sorin P. Voinigescu (BCICTS, 2018)

A 256-Gbps PAM-4 Signal Generator IC in 0.25-µm InP DHBT Technology. - Munehiko Nagatani; Hitoshi Wakita; Teruo Jyo; Miwa Mutoh; Minoru Ida; Sorin P. Voinigescu; Hideyuki Nosaka (BCICTS, 2018)

A 2x-Oversampling, 128-GS/s 5-bit Flash ADC for 64-GBaud Applications. - Alireza Zandieh; Peter Schvan; Sorin P. Voinigescu (BCICTS, 2018)

128-GS/s ADC Front-End with Over 60-GHz Input Bandwidth in 22-nm Si/SiGe FDSOI CMOS. - Alireza Zandieh; Naftali Weiss; The'Linh Nguyen; David Haranne; Sorin P. Voinigescu (BCICTS, 2018)

mmWand high speed solutions enabled by FD-SOI. - Sorin P. Voinigescu (ESSDERC, 2018)

AD-Band Digital Transmitter with 64-QAM and OFDM Free-Space Constellation Formation. - Stefan Shopov; Ozan D. Gurbuz; Gabriel M. Rebeiz; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2018)

A 4.6V, 6-bit, 64GS/s Transmitter in 22nm FDSOI CMOS. - Jashva Rafique; The'Linh Nguyen; Sorin P. Voinigescu (BCICTS, 2019)

Design of a 55-nm SiGe BiCMOS 5-bit Time-Interleaved Flash ADC for 64-Gbd 16-QAM Fiberoptics Applications. - Alireza Zandieh; Peter Schvan; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2019)

200-GS/s ADC Front-End Employing 25% Duty Cycle Quadrature Clock Generator. - Naftali Weiss; Gregory Cooke; Peter Schvan; Pascal Chevalier 002; Andreia Cathelin; Sorin P. Voinigescu (ESSCIRC, 2021)

Compact Modelling of 22nm FDSOI CMOS Semiconductor Quantum Dot Cryogenic I-V Characteristics. - Suyash Pati Tripathi; Shai Bonen; Claudia Nastase; Sergiu Iordanescu; George Boldeiu; Mircea Pasteanu; Alexandru Müller; Sorin P. Voinigescu (ESSDERC, 2021)

A Circuit Designer's Perspective on Transistor Modelling Challenges for 6G, Fiberoptics, and Quantum Computing ICs. - Sorin P. Voinigescu; Shai Bonen; Suyash Pati Tripathi; Saurabh Bagchi; Gregory Cooke; T. Jager; Akash Bharadwaj; Jessica Zhao (BCICTS, 2023)

An 80-GBaud PAM-4 $G_{ mathrm{m}}$ -Boosted Variable-Gain TIA in 22-nm FDSOI. - Jianan Zhao 012; Sorin P. Voinigescu (BCICTS, 2023)