Modular Design Structure and High-Level Prototyping for Novel Embedded Processor Core. - Ben A. Abderazek; Sotaro Kawata; Tsutomu Yoshinaga; Masahiro Sowa (EUC, 2005)

An Efficient Dynamic Switching Mechanism (DSM) for Hybrid Processor Architecture. - Md. Musfiquzzaman Akanda; Ben A. Abderazek; Sotaro Kawata; Masahiro Sowa (EUC, 2005)

Design and architecture for an embedded 32-bit QueueCore. - Ben A. Abderazek; Sotaro Kawata; Masahiro Sowa (J. Embed. Comput., 2006)

Frequency-Multiplexing Ability of Complex-Valued Hebbian Learning in Logic Gates. - Sotaro Kawata; Akira Hirose 001 (Int. J. Neural Syst., 2008)