VLSI design of a one-chip data-driven processor: Q-v1. - Hiroaki Terada; Hiroaki Nishikawa; Katsuhiko Asada; Satoshi Matsumoto; Souichi Miyata (FJCC, 1987)

Hardware Structure of a One-Chip Data Driven Processor: Q-p. - Katsuhiko Asada; Hiroaki Terada; Satoshi Matsumoto; Souichi Miyata; Hajime Asano; Hiroki Miura; Masahisa Shimizu; Shinji Komori; Takeshi Fukuhara; Kenji Shima (ICPP, 1987)

The data-driven microprocessor. - Shinji Komori; Kenji Shima; Souichi Miyata; Toshiya Okamoto; Hiroaki Terada (IEEE Micro, 1989)

A data-driven implementation of telecommunication network systems. - Hiroaki Nishikawa; Souichi Miyata; Shin-ichi Yoshida; Tsuyoshi Muramatsu; Hiroshi Ishii 002; Hidetsugu Kobayashi; Yuji Inoue (ISADS, 1997)

Super-Integrated Data-Driven Processor for TINA-kTn Protocol Handling. - Kazuhiro Aoki; Hiroshi Ishii 002; Souichi Miyata; Hiroaki Nishikawa (PDPTA, 1999)

DDMPs: self-timed super-pipelined data-driven multimedia processors. - Hiroaki Terada; Souichi Miyata; Makoto Iwata (Proc. IEEE, 1999)

A self-timed superpipeline data-driven processor. - Makoto Iwata; Souichi Miyata; Hiroaki Terada (Syst. Comput. Jpn., 2000)