Hardware implementation of the Hirschman Optimal Transform. - Soumak Mookherjee; Linda DeBrunner; Victor E. DeBrunner (ACSCC, 2012)

Energy optimization of Application-Specific Instruction-Set Processors by using hardware accelerators in semicustom ICs technology. - Uwe Meyer-Bäse; Guillermo Botella Juan; Soumak Mookherjee; Encarnación Castillo; Antonio García 001 (Microprocess. Microsystems, 2012)

A hardware efficient technique for linear convolution of finite length sequences. - Soumak Mookherjee; Linda DeBrunner; Victor E. DeBrunner (ACSSC, 2013)

A high throughput and low power radix-4 FFT architecture. - Soumak Mookherjee; Linda DeBrunner; Victor E. DeBrunner (ACSSC, 2014)

A low power radix-2 FFT accelerator for FPGA. - Soumak Mookherjee; Linda DeBrunner; Victor E. DeBrunner (ACSSC, 2015)