A unified flagged prefix constant addition-subtraction scheme for design of area and power efficient binary floating-point and constant integer arithmetic circuits. - Soumya Ganguly; Abhishek Mittal; Syed Ershad Ahmed; M. B. Srinivas (APCCAS, 2014)

Efficient VLSI Architecture for Decimation-in-Time Fast Fourier Transform of Real-Valued Data. - Pramod Kumar Meher; Basant Kumar Mohanty; Sujit Kumar Patel; Soumya Ganguly; Thambipillai Srikanthan (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Uniform Ck Approximation of G-Invariant and Antisymmetric Functions, Embedding Dimensions, and Polynomial Representations. - Soumya Ganguly; Khoa Tran; Rahul Sarkar (CoRR, 2024)