A 14-b linear capacitor self-trimming pipelined ADC. - Seung-Tak Ryu; Sourja Ray; Bang-Sup Song; Gyu-Hyeong Cho; Kantilal Bacrania (IEEE J. Solid State Circuits, 2004)

A 13b linear 40MS/s pipelined ADC with self-configured capacitor matching. - Sourja Ray; Bang-Sup Song (ISSCC, 2006)

A 13-b Linear, 40-MS/s Pipelined ADC With Self-Configured Capacitor Matching. - Sourja Ray; Bang-Sup Song (IEEE J. Solid State Circuits, 2007)

Calibration of multi-bit per stage pipelined ADC using statistical properties of capacitor arrays - Sourja Ray (2008)

A 14b 2.5GS/s 8-way-interleaved pipelined ADC with background calibration and digital dynamic linearity correction. - Brian Setterberg; Ken Poulton; Sourja Ray; Dan J. Huber; Valentin Abramzon; Guenter Steinbach; John P. Keane; Bernd Wuppermann; Mathew Clayson; Matthew Martin; Rizwan Pasha; Edda Peeters; et al. (ISSCC, 2013)