29.7 A 2.5GHz injection-locked ADPLL with 197fsrms integrated jitter and -65dBc reference spur using time-division dual calibration. - Sungwoo Kim 001; Han-Gon Ko; Sung-Yong Cho; Jinhyung Lee; Soyeong Shin; Min-Seong Choo; Hankyu Chi; Deog-Kyoon Jeong (ISSCC, 2017)

A 370-fJ/b, 0.0056 mm2/DQ, 4.8-Gb/s DQ Receiver for HBM3 with a Baud-Rate Self-Tracking Loop. - Han-Gon Ko; Soyeong Shin; Chan-Ho Kye; Sang-Yoon Lee 006; Jaekwang Yun; Hae-Kang Jung; Doobock Lee; Suhwan Kim 001; Deog-Kyoon Jeong (VLSI Circuits, 2019)

6.7 An 8Gb/s/µm FFE-Combined Crosstalk-Cancellation Scheme for HBM on Silicon Interposer with 3D-Staggered Channels. - Han-Gon Ko; Soyeong Shin; Jonghyun Oh; Kwanseo Park; Deog-Kyoon Jeong (ISSCC, 2020)

22.6 A 0.8-to-2.3GHz Quadrature Error Corrector with Correctable Error Range of 101.6ps Using Minimum Total Delay Tracking and Asynchronous Calibration On-Off Scheme for DRAM Interface. - Soyeong Shin; Han-Gon Ko; Sungchun Jang; Dongkyun Kim; Deog-Kyoon Jeong (ISSCC, 2020)

A 0.83-pJ/Bit 6.4-Gb/s HBM Base Die Receiver Using a 45° Strobe Phase for Energy-Efficient Skew Compensation. - Sangyoon Lee 006; Han-Gon Ko; Joo-Hyung Chae; Soyeong Shin; Jaekwang Yun; Deog-Kyoon Jeong; Suhwan Kim 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A 0.45 pJ/b, 6.4 Gb/s Forwarded-Clock Receiver With DLL-Based Self-Tracking Loop for Unmatched Memory Interfaces. - Soyeong Shin; Han-Gon Ko; Chan-Ho Kye; Sang-Yoon Lee 006; Jaekwang Yun; Doobock Lee; Hae-Kang Jung; Suhwan Kim 001; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A PVT Variation-Robust All-Digital Injection-Locked Clock Multiplier With Real-Time Offset Tracking Using Time-Division Dual Calibration. - Min-Seong Choo; Sungwoo Kim 001; Han-Gon Ko; Sung-Yong Cho; Kwanseo Park; Jinhyung Lee; Soyeong Shin; Hankyu Chi; Deog-Kyoon Jeong (IEEE J. Solid State Circuits, 2021)

0.41-pJ/b/dB Asymmetric Simultaneous Bidirectional Transceivers With PAM-4 Forward and PAM-2 Back Channels for 5-m Automotive Camera Link. - Yunhee Lee; Woonghee Lee 005; Minkyo Shim; Soyeong Shin; Woo-Seok Choi; Deog-Kyoon Jeong (VLSI Technology and Circuits, 2022)

Area and Power Efficient 10B6Q PAM-4 DC Balance Coder for Automotive Camera Link. - Woonghee Lee 005; Minkyo Shim; Yunhee Lee; Heejin Yang; Soyeong Shin; Woo-Seok Choi; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A Clock Distribution Scheme Insensitive to Supply Voltage Drift With Self-Adjustment of Clock Buffer Delay. - Soyeong Shin; Yongjae Lee; Jiheon Park; Jihyo Kang; Kyunghoon Kim; Dae-Han Kwon; Sangkwon Lee; Jieun Jang; Joo-Hwan Cho; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

An 8-GHz Octa-Phase Error Corrector With Coprime Phase Comparison Scheme in 40-nm CMOS. - Jung-Woo Sull; Soyeong Shin; Jonghyun Oh; Kwang-Hoon Lee; Jihee Kim; Jung-Hun Park; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)