A Charge-Domain Computation-In-Memory Macro with Versatile All-Around-Wire-Capacitor for Variable-Precision Computation and Array-Embedded DA/AD Conversions. - Gicheol Shin; Donguk Seo; Jaerok Kim; Johnny Rhe; Eunyoung Lee; Seonho Kim; Soyoun Jeong; Jong Hwan Ko; Yoonmyung Lee (ESSDERC, 2021)

A Charge-Domain Scalable-Weight In-Memory Computing Macro With Dual-SRAM Architecture for Precision-Scalable DNN Accelerators. - Eunyoung Lee; Taeyoung Han; Donguk Seo; Gicheol Shin; Jaerok Kim; Seonho Kim; Soyoun Jeong; Johnny Rhe; Jaehyun Park 012; Jong Hwan Ko; Yoonmyung Lee (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Logic-embedded Physically Unclonable Functions for Synthesizable and Periphery-free Implementation for Low Area and Design Cost IoT Security. - Seonho Kim; Changyoun Im; Jongmin Lee 001; Soyoun Jeong; Jaerok Kim; Yoonmyung Lee (ESSCIRC, 2022)

Variation-Tolerant and Low R-Ratio Compute-in-Memory ReRAM Macro With Capacitive Ternary MAC Operation. - Soyoun Jeong; Jaerok Kim; Minhyeok Jeong; Yoonmyung Lee (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)