Low-power design of array architectures. - Dimitrios Soudris; George Theodoridis; S. Theoharis; Adonios Thanailakis (ICECS, 1996)

A novel approach for reducing the switching activity in two-level logic circuits. - George Theodoridis; S. Theoharis; Dimitrios Soudris; Odysseas G. Koufopavlou; Costas E. Goutis (ICECS, 1996)

An efficient probabilistic method for logic circuits using real delay gate model. - George Theodoridis; S. Theoharis; Dimitrios Soudris; Thanos Stouraitis; Constantinos E. Goutis (ISCAS (1), 1999)

A New Method for Low Power Design of Two-Level Logic Circuits. - George Theodoridis; Spyros Theoharis; Dimitrios Soudris; Constantinos E. Goutis (VLSI Design, 1999)

Low power design of a multi-mode transceiver. - Dimitrios Soudris; Minas Perakis; Haris Mizas; Vasilios A. Mardiris; Kosfas Katis; Chrissavgi Dre; A. E. Tzimas; E. G. Metaxakis; Grigorios Kalivas; Nikolaos D. Zervas; Spyros Theoharis; George Theodoridis; et al. (ISCAS, 2000)

A methodology for the behavioral-level event-driven power management of digital receivers. - Nikolaos D. Zervas; Dimitrios Soudris; Spyros Theoharis; Constantinos E. Goutis; Adonios Thanailakis (ISCAS, 2000)

Low power synthesis of sum-of-products computation (poster session). - Kostas Masselos; S. Theoharis; Panagiotis Merakos; Thanos Stouraitis; Constantinos E. Goutis (ISLPED, 2000)

Accurate Power Estimation of Logic Structures Based on Timed Boolean Functions. - George Theodoridis; S. Theoharis; Nikolaos D. Zervas; Constantinos E. Goutis (PATMOS, 2000)

Reducing Power Consumption through Dynamic Frequency Scaling for a Class of Digital Receivers. - Nikolaos D. Zervas; S. Theoharis; Athanasios Kakarountas; George Theodoridis; Dimitrios Soudris; Constantinos E. Goutis (PATMOS, 2000)

A Probabilistic Power Estimation Method for Combinational Circuits Under Real Gate Delay Model. - George Theodoridis; Spyros Theoharis; Dimitrios Soudris; Constantinos E. Goutis (VLSI Design, 2001)

A Fast and Accurate Method of Power Estimation for Logic Level Networks. - George Theodoridis; S. Theoharis; Dimitrios Soudris; Constantinos E. Goutis (VLSI Design, 2001)

Quantizing the 9/7 Daubechies filter coefficients for 2D DWT VLSI implementations. - Vassilis Spiliotopoulos; Nikolaos D. Zervas; Christos E. Androulidakis; Giorgos Anagnostopoulos; Spyros Theoharis (DSP, 2002)

A fast and accurate delay dependent method for switching estimation of large combinational circuits. - S. Theoharis; George Theodoridis; Dimitrios Soudris; Constantinos E. Goutis; Adonios Thanailakis (J. Syst. Archit., 2002)

Memory accesses reordering for interconnect power reduction in sum-of-products computations. - Konstantinos Masselos; Spyros Theoharis; Panagiotis Merakos; Thanos Stouraitis; Costas E. Goutis (IEEE Trans. Signal Process., 2002)

Low-power Implementation of an Encryption/Decryption System with Asynchronous Techniques. - Nikos Sklavos 001; Alexandros Papakonstantinou; Spyros Theoharis; Odysseas G. Koufopavlou (VLSI Design, 2002)

Power efficient data path synthesis of sum-of-products computations. - Kostas Masselos; Panagiotis Merakos; S. Theoharis; Thanos Stouraitis; Constantinos E. Goutis (IEEE Trans. Very Large Scale Integr. Syst., 2003)