Cycles to Recycle: Garbage Collection on the IA-64. - Richard L. Hudson; J. Eliot B. Moss; Sreenivas Subramoney; Weldon Washburn (ISMM, 2000)

Prefetch inection based on hardware monitoring and object metadata. - Ali-Reza Adl-Tabatabai; Richard L. Hudson; Mauricio J. Serrano; Sreenivas Subramoney (PLDI, 2004)

Bypass and insertion algorithms for exclusive last-level caches. - Jayesh Gaur; Mainak Chaudhuri; Sreenivas Subramoney (ISCA, 2011)

Introducing hierarchy-awareness in replacement and bypass algorithms for last-level caches. - Mainak Chaudhuri; Jayesh Gaur; Nithiyanandan Bashyam; Sreenivas Subramoney; Joseph Nuzman (PACT, 2012)

Efficient management of last-level caches in graphics processors for 3D scene rendering workloads. - Jayesh Gaur; Raghuram Srinivasan; Sreenivas Subramoney; Mainak Chaudhuri (MICRO, 2013)

Array scalarization in high level synthesis. - Preeti Ranjan Panda; Namita Sharma 001; Arun Kumar Pilania; Gummidipudi Krishnaiah; Sreenivas Subramoney; Ashok Jagannathan (ASP-DAC, 2014)

Machine Learned Machines: Adaptive co-optimization of caches, cores, and On-chip Network. - Rahul Jain 004; Preeti Ranjan Panda; Sreenivas Subramoney (DATE, 2016)

Base-Victim Compression: An Opportunistic Cache Compression Architecture. - Jayesh Gaur; Alaa R. Alameldeen; Sreenivas Subramoney (ISCA, 2016)

A coordinated multi-agent reinforcement learning approach to multi-level cache co-partitioning. - Rahul Jain 004; Preeti Ranjan Panda; Sreenivas Subramoney (DATE, 2017)

Near-Optimal Access Partitioning for Memory Hierarchies with Multiple Heterogeneous Bandwidth Sources. - Jayesh Gaur; Mainak Chaudhuri; Pradeep Ramachandran; Sreenivas Subramoney (HPCA, 2017)

Micro-Sector Cache: Improving Space Utilization in Sectored DRAM Caches. - Mainak Chaudhuri; Mukesh Agrawal 001; Jayesh Gaur; Sreenivas Subramoney (ACM Trans. Archit. Code Optim., 2017)

Cooperative Multi-Agent Reinforcement Learning-Based Co-optimization of Cores, Caches, and On-chip Network. - Rahul Jain 004; Preeti Ranjan Panda; Sreenivas Subramoney (ACM Trans. Archit. Code Optim., 2017)

Closed yet open DRAM: achieving low latency and high performance in DRAM memory systems. - Lavanya Subramanian; Kaushik Vaidyanathan; Anant Nori; Sreenivas Subramoney; Tanay Karnik; Hong Wang 003 (DAC, 2018)

Density Tradeoffs of Non-Volatile Memory as a Replacement for SRAM Based Last Level Cache. - Kunal Korgaonkar; Ishwar Bhati; Huichu Liu; Jayesh Gaur; Sasikanth Manipatruni; Sreenivas Subramoney; Tanay Karnik; Steven Swanson; Ian Young 001; Hong Wang 003 (ISCA, 2018)

Criticality Aware Tiered Cache Hierarchy: A Fundamental Relook at Multi-Level Cache Hierarchies. - Anant Nori; Jayesh Gaur; Siddharth Rai; Sreenivas Subramoney; Hong Wang 003 (ISCA, 2018)

Tackling memory access latency through DRAM row management. - Sriseshan Srikanth; Lavanya Subramanian; Sreenivas Subramoney; Thomas M. Conte; Hong Wang 003 (MEMSYS, 2018)

MARS: Memory Aware Reordered Source. - Ishwar Bhati; Udit Dhawan; Jayesh Gaur; Sreenivas Subramoney; Hong Wang 003 (CoRR, 2018)

Visual Inertial Odometry At the Edge: A Hardware-Software Co-design Approach for Ultra-low Latency and Power. - Dipan Kumar Mandal; Srivatsava Jandhyala; Om Ji Omer; Gurpreet S. Kalsi; Biji George; Gopi Neela; Santhosh Kumar Rethinagiri; Sreenivas Subramoney; Lance Hacking; Jim Radford; Eagle Jones; Belliappa Kuttanna; et al. (DATE, 2019)

Bandwidth-Aware Last-Level Caching: Efficiently Coordinating Off-Chip Read and Write Bandwidth. - Mainak Chaudhuri; Jayesh Gaur; Sreenivas Subramoney (ICCD, 2019)

DSPatch: Dual Spatial Pattern Prefetcher. - Rahul Bera; Anant V. Nori; Onur Mutlu; Sreenivas Subramoney (MICRO, 2019)

Towards the adoption of Local Branch Predictors in Modern Out-of-Order Superscalar Processors. - Niranjan Soundararajan; Saurabh Gupta; Ragavendra Natarajan; Jared Stark; Rahul Pal; Franck Sala; Lihu Rappoport; Adi Yoaz; Sreenivas Subramoney (MICRO, 2019)

Opportunistic Early Pipeline Re-steering for Data-dependent Branches. - Saurabh Gupta; Niranjan Soundararajan; Ragavendra Natarajan; Sreenivas Subramoney (PACT, 2020)

PSB-RNN: A Processing-in-Memory Systolic Array Architecture using Block Circulant Matrices for Recurrent Neural Networks. - Nagadastagiri Challapalle; Sahithi Rampalli; Makesh Chandran; Gurpreet S. Kalsi; Sreenivas Subramoney; John Sampson; Vijaykrishnan Narayanan (DATE, 2020)

Descriptor Scoring for Feature Selection in Real-Time Visual Slam. - Prashant Laddha; Om Ji Omer; Gurpreet Singh Kalsi; Dipan Kumar Mandal; Sreenivas Subramoney (ICIP, 2020)

Towards Noise Resilient SLAM. - Anirud Thyagharajan; Om Ji Omer; Dipan Mandal; Sreenivas Subramoney (ICRA, 2020)

Focused Value Prediction. - Sumeet Bandishte; Jayesh Gaur; Zeev Sperber; Lihu Rappoport; Adi Yoaz; Sreenivas Subramoney (ISCA, 2020)

Auto-Predication of Critical Branches. - Adarsh Chauhan; Jayesh Gaur; Zeev Sperber; Franck Sala; Lihu Rappoport; Adi Yoaz; Sreenivas Subramoney (ISCA, 2020)

Characterization of Data Generating Neural Network Applications on x86 CPU Architecture. - Antara Ganguly; Shankar Balachandran; Anant V. Nori; Virendra Singh; Sreenivas Subramoney (ISPASS, 2020)

GenASM: A High-Performance, Low-Power Approximate String Matching Acceleration Framework for Genome Sequence Analysis. - Damla Senol Cali; Gurpreet S. Kalsi; Zülal Bingöl; Can Firtina; Lavanya Subramanian; Jeremie S. Kim; Rachata Ausavarungnirun; Mohammed Alser; Juan Gómez-Luna; Amirali Boroumand; Anant Nori; Allison Scibisz; et al. (MICRO, 2020)

Look-Up Table based Energy Efficient Processing in Cache Support for Neural Network Acceleration. - Akshay Krishna Ramanathan; Gurpreet S. Kalsi; Srivatsa Srinivasa; Tarun Makesh Chandran; Kamlesh R. Pillai; Om Ji Omer; Vijaykrishnan Narayanan; Sreenivas Subramoney (MICRO, 2020)

Proximu: Efficiently Scaling DNN Inference in Multi-core CPUs through Near-Cache Compute. - Anant V. Nori; Rahul Bera; Shankar Balachandran; Joydeep Rakshit; Om Ji Omer; Avishaii Abuhatzera; Belliappa Kuttanna; Sreenivas Subramoney (CoRR, 2020)

AccSS3D: Accelerator for Spatially Sparse 3D DNNs. - Om Ji Omer; Prashant Laddha; Gurpreet S. Kalsi; Anirud Thyagharajan; Kamlesh R. Pillai; Abhimanyu Kulkarni; Anbang Yao; Yurong Chen 001; Sreenivas Subramoney (CoRR, 2020)

REAL: REquest Arbitration in Last Level Caches. - Sakshi Tiwari; Shreshth Tuli; Isaar Ahmad; Ayushi Agarwal; Preeti Ranjan Panda; Sreenivas Subramoney (ACM Trans. Embed. Comput. Syst., 2020)

RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU. - Geonhwa Jeong; Eric Qin 001; Ananda Samajdar; Christopher J. Hughes; Sreenivas Subramoney; Hyesoon Kim; Tushar Krishna (DAC, 2021)

ONT-X: An FPGA Approach to Real-time Portable Genomic Analysis. - C. N. Ramachandra; Anirban Nag; Rajeev Balasubramonian; Gurpreet S. Kalsi; Kamlesh R. Pillai; Sreenivas Subramoney (FCCM, 2021)

REDUCT: Keep it Close, Keep it Cool! : Efficient Scaling of DNN Inference on Multi-core CPUs with Near-Cache Compute. - Anant V. Nori; Rahul Bera; Shankar Balachandran; Joydeep Rakshit; Om Ji Omer; Avishaii Abuhatzera; Belliappa Kuttanna; Sreenivas Subramoney (ISCA, 2021)

Radiant: efficient page table management for tiered memory systems. - Sandeep Kumar; Aravinda Prasad; Smruti R. Sarangi; Sreenivas Subramoney (ISMM, 2021)

Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning. - Rahul Bera; Konstantinos Kanellopoulos; Anant Nori; Taha Shahroodi; Sreenivas Subramoney; Onur Mutlu (MICRO, 2021)

Twig: Profile-Guided BTB Prefetching for Data Center Applications. - Tanvir Ahmed Khan; Nathan Brown; Akshitha Sriraman; Niranjan K. Soundararajan; Rakesh Kumar 003; Joseph Devietti; Sreenivas Subramoney; Gilles A. Pokam; Heiner Litz; Baris Kasikci (MICRO, 2021)

Cryptographic Capability Computing. - Michael LeMay; Joydeep Rakshit; Sergej Deutsch; David M. Durham; Santosh Ghosh; Anant Nori; Jayesh Gaur; Andrew Weiler; Salmin Sultana; Karanvir Grewal; Sreenivas Subramoney (MICRO, 2021)

PDede: Partitioned, Deduplicated, Delta Branch Target Buffer. - Niranjan K. Soundararajan; Peter Braun 005; Tanvir Ahmed Khan; Baris Kasikci; Heiner Litz; Sreenivas Subramoney (MICRO, 2021)

Page Table Management for Heterogeneous Memory Systems. - Sandeep Kumar; Aravinda Prasad; Smruti R. Sarangi; Sreenivas Subramoney (CoRR, 2021)

Robust 3D Scene Segmentation through Hierarchical and Learnable Part-Fusion. - Anirud Thyagharajan; Benjamin Ummenhofer; Prashant Laddha; Om Ji Omer; Sreenivas Subramoney (CoRR, 2021)

Segment-Fusion: Hierarchical Context Fusion for Robust 3D Semantic Segmentation. - Anirud Thyagharajan; Benjamin Ummenhofer; Prashant Laddha; Om Ji Omer; Sreenivas Subramoney (CVPR, 2022)

SeGraM: a universal hardware accelerator for genomic sequence-to-graph and sequence-to-sequence mapping. - Damla Senol Cali; Konstantinos Kanellopoulos; Joël Lindegger; Zülal Bingöl; Gurpreet S. Kalsi; Ziyi Zuo; Can Firtina; Meryem Banu Cavlak; Jeremie S. Kim; Nika Mansouri-Ghiasi; Gagandeep Singh 002; Juan Gómez-Luna; et al. (ISCA, 2022)

Register file prefetching. - Sudhanshu Shukla; Sumeet Bandishte; Jayesh Gaur; Sreenivas Subramoney (ISCA, 2022)

Thermometer: profile-guided btb replacement for data center applications. - Shixin Song; Tanvir Ahmed Khan; Sara Mahdizadeh-Shahri; Akshitha Sriraman; Niranjan K. Soundararajan; Sreenivas Subramoney; Daniel A. Jiménez; Heiner Litz; Baris Kasikci (ISCA, 2022)

Compute-In-Memory Using 6T SRAM for a Wide Variety of Workloads. - Pramod Kumar Bharti; Saurabh Jain; Kamlesh R. Pillai; Sagar Varma Sayyaparaju; Gurpreet S. Kalsi; Joycee Mekie; Sreenivas Subramoney (ISCAS, 2022)

Speculative Code Compaction: Eliminating Dead Code via Speculative Microcode Transformations. - Logan Moody; Wei Qi; Abdolrasoul Sharifi; Layne Berry; Joey Rudek; Jayesh Gaur; Jeff Parkhurst; Sreenivas Subramoney; Kevin Skadron; Ashish Venkat (MICRO, 2022)

Disrupting Low-Write-Energy vs. Fast-Read Dilemma in RRAM to Enable L1 Instruction Cache. - Ashwin Sanjay Lele; Srivatsava Jandhyala; Saurabh Gangurde; Virendra Singh; Sreenivas Subramoney; Udayan Ganguly (VDAT, 2022)

Unsupervised Learning of Depth, Camera Pose and Optical Flow from Monocular Video. - Dipan Mandal; Abhilash Jain; Sreenivas Subramoney (CoRR, 2022)

A Survey of Deep Learning on CPUs: Opportunities and Co-Optimizations. - Sparsh Mittal; Poonam Rajput; Sreenivas Subramoney (IEEE Trans. Neural Networks Learn. Syst., 2022)

A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra. - Biji George; Om Ji Omer; Ziaul Choudhury; Anoop V; Sreenivas Subramoney (ACM Trans. Embed. Comput. Syst., 2022)

VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs. - Geonhwa Jeong; Sana Damani; Abhimanyu Rajeshkumar Bambhaniya; Eric Qin 001; Christopher J. Hughes; Sreenivas Subramoney; Hyesoon Kim; Tushar Krishna (HPCA, 2023)

Reclaimer: A Reinforcement Learning Approach to Dynamic Resource Allocation for Cloud Microservices. - Quintin Fettes; Avinash Karanth; Razvan C. Bunescu; Brandon Beckwith; Sreenivas Subramoney (CoRR, 2023)

Motivating Next-Generation OS Physical Memory Management for Terabyte-Scale NVMMs. - Shivank Garg; Aravinda Prasad; Debadatta Mishra; Sreenivas Subramoney (CoRR, 2023)

Telescope: Telemetry at Terabyte Scale. - Alan Nair; Sandeep Kumar; Aravinda Prasad; Andy Rudoff; Sreenivas Subramoney (CoRR, 2023)

Enhanced regularization for on-chip training using analog and temporary memory weights. - Raghav Singhal; Vivek Saraswat; Shreyas Deshmukh; Sreenivas Subramoney; Laxmeesha Somappa; Maryam Shojaei Baghini; Udayan Ganguly (Neural Networks, 2023)

Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution. - Rahul Bera; Adithya Ranganathan; Joydeep Rakshit; Sujit Mahto; Anant V. Nori; Jayesh Gaur; Ataberk Olgun; Konstantinos Kanellopoulos; Mohammad Sadrosadati; Sreenivas Subramoney; Onur Mutlu (ISCA, 2024)

Telescope: Telemetry for Gargantuan Memory Footprint Applications. - Alan Nair; Sandeep Kumar; Aravinda Prasad; Ying Huang; Andy Rudoff; Sreenivas Subramoney (USENIX ATC, 2024)

CiMNet: Towards Joint Optimization for DNN Architecture and Configuration for Compute-In-Memory Hardware. - Souvik Kundu 002; Anthony Sarah; Vinay Joshi; Om Ji Omer; Sreenivas Subramoney (CoRR, 2024)

Taming Server Memory TCO with Multiple Software-Defined Compressed Tiers. - Sandeep Kumar; Aravinda Prasad; Sreenivas Subramoney (CoRR, 2024)

QCQA: Quality and Capacity-aware grouped Query Attention. - Vinay Joshi; Prashant Laddha; Shambhavi Sinha; Om Ji Omer; Sreenivas Subramoney (CoRR, 2024)

iMIV: in-Memory Integrity Verification for NVM. - Rajat Jain; Aravinda Prasad; Sreenivas Subramoney; Arkaprava Basu (CoRR, 2024)

ApHMM: Accelerating Profile Hidden Markov Models for Fast and Energy-efficient Genome Analysis. - Can Firtina; Kamlesh R. Pillai; Gurpreet S. Kalsi; Bharathwaj Suresh; Damla Senol Cali; Jeremie S. Kim; Taha Shahroodi; Meryem Banu Cavlak; Joël Lindegger; Mohammed Alser; Juan Gómez-Luna; Sreenivas Subramoney; et al. (ACM Trans. Archit. Code Optim., 2024)

TierTrain: Proactive Memory Tiering for CPU-Based DNN Training. - Sathvik Swaminathan; Sandeep Kumar; Aravinda Prasad; Sreenivas Subramoney (ISMM, 2025)

Efficient Memory Tiering in a Virtual Machine. - Chandra Prakash; Aravinda Prasad; Sandeep Kumar; Sreenivas Subramoney (CoRR, 2025)