A TCAD Performance Analysis of an Inverter with 80% Non-Alignment in Gate in sub-45 nm Technology. - Arun Kumar Sinha; Sri Lakshmi Sangam (VDAT, 2024)

Design and Test of Nanoscale Non-Aligned Double Gate FET Inverter and Ring Oscillator for Low-Power Application in TCAD Simulation Environment. - Sri Lakshmi Sangam; Arun Kumar Sinha (J. Circuits Syst. Comput., 2025)