Optimal Design of Multiplier-Less Non-uniform Channel Filters with Successive Approximation of Vectors. - K. Baboji; Sriadibhatla Sridevi (Circuits Syst. Signal Process., 2019)

High speed and low area decision feed-back equalizer with novel memory less distributed arithmetic filter. - Grande NagaJyothi; Sriadibhatla Sridevi (Multim. Tools Appl., 2019)

High speed low area OBC DA based decimation filter for hearing aids application. - Grande NagaJyothi; Sriadibhatla Sridevi (Int. J. Speech Technol., 2020)

Dual bit control low-power dynamic content addressable memory design for IoT applications. - V. V. Satyanarayana Satti; Sriadibhatla Sridevi (Turkish J. Electr. Eng. Comput. Sci., 2021)

Evaluating Winograd Algorithm for Convolution Neural Network using Verilog. - Mihir Achyuta S. P; K. S. V. Pradyumna; Nithesh C; Dinah Ann Varughese; Sriadibhatla Sridevi (iSES, 2022)

Design and analysis of a dual gate tunnel FET with InGaAs source pockets for improved performance. - Gadarapulla Rasheed; Sriadibhatla Sridevi (Microelectron. J., 2022)

Design of 7T SRAM Using InGaAs-Dual Pocket-Dual Gate-Tunnel FET for IoT Applications. - Gadarapulla Rasheed; Sriadibhatla Sridevi (IEEE Access, 2023)

DFPT-CNN: A Dual Feature Extraction and Pretrained CNN Synergy for Minimal Computational Overhead and Enhanced Accuracy in Multi-Class Medical Image Classification. - Dinah Ann Varughese; Sriadibhatla Sridevi (IEEE Access, 2024)

Analytical modeling of threshold voltage and on-resistance in multi-barrier E-mode MISHEMT with gate-recess and field-plates. - K. Nagabushanam; Sriadibhatla Sridevi (Microelectron. J., 2024)