A 200-MHz 64-bit Dual-Issue CMOS Microprocessor. - Daniel W. Dobberpuhl; Richard T. Witek; Randy L. Allmon; Robert Anglin; David Bertucci; Sharon M. Britton; Linda Chao; Robert A. Conrad; Daniel E. Dever; Bruce Gieseke; Soha Hassoun; Gregory W. Hoeppner; et al. (Digit. Tech. J., 1992)

A 200-MHz 64-b dual-issue CMOS microprocessor. - Daniel W. Dobberpuhl; Richard T. Witek; Randy L. Allmon; Robert Anglin; David Bertucci; Sharon M. Britton; Linda Chao; Robert A. Conrad; Daniel E. Dever; Bruce Gieseke; Soha Hassoun; Gregory W. Hoeppner; et al. (IEEE J. Solid State Circuits, 1992)

Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU - William J. Bowhill; Shane L. Bell; Bradley J. Benschneider; Andrew J. Black; Sharon M. Britton; Ruben W. Castelino; Dale R. Donchin; John H. Edmondson; Harry R. Fair III; Paul E. Gronowski; Anil K. Jain 003; Patricia L. Kroesen; et al. (Digit. Tech. J., 1995)

A 300-MHz 64-b quad-issue CMOS RISC microprocessor. - Bradley J. Benschneider; Andrew J. Black; William J. Bowhill; Sharon M. Britton; Daniel E. Dever; Dale R. Donchin; Robert J. Dupcak; Richard M. Fromm; Mary K. Gowan; Paul E. Gronowski; Michael Kantrowitz; Marc E. Lamere; et al. (IEEE J. Solid State Circuits, 1995)

A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor. - James Montanaro; Richard T. Witek; Krishna Anne; Andrew J. Black; Elizabeth M. Cooper; Daniel W. Dobberpuhl; Paul M. Donahue; Jim Eno; Gregory W. Hoeppner; David Kruckemyer; Thomas H. Lee; Peter C. M. Lin; et al. (Digit. Tech. J., 1997)

A low-cost, 300-MHz, RISC CPU with attached media processor. - Sribalan Santhanam; Allen J. Baum; David Bertucci; Mike Braganza; Kevin Broch; Todd Broch; James Burnette; Edward Chang; Kwong-Tak Chui; Dan Dobberpuhl; Paul M. Donahue; Joel Grodstein; et al. (IEEE J. Solid State Circuits, 1998)

Entering the hot zone - can you handle the heat and be cool? - Andrew Yang; Rajit Chandra; Simon Burke; Javier A. DeLaCruz; Sribalan Santhanam; Uming Ko (DAC, 2006)

A 2GHz, 7W (max) 64b PowerTM Microprocessor Core. - Daniel Murray; James Burnette; Brian Campbell 004; Mark Chung; Bruce Fernandes; Subhendra Ghosh; Rajat Goel; Greg Hess; Hang Huang; Zhibin Huang; Naveen Javarappa; Pradeep Kanapathipillai; et al. (CICC, 2007)

A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems. - Zongjian Chen; Priya Ananthanarayanan; Sukalp Biswas; Brian Campbell 004; Hao Chen; Shaishav Desai; Dominic Go; Rajat Goel; Vincent von Kaenel; Jason Kassoff; Fabian Klass; Weichun Ku; et al. (ISSCC, 2007)