Design verification of a VLSI VAX microcomputer. - Sridhar Samudrala; Charles Lo; John F. Brown III; Richard E. Calcagni (MICRO, 1984)

On the implementation of shifters, multipliers, and dividers in VLSI floating point units. - Victor Peng; Sridhar Samudrala; Moshe Gavrielov (IEEE Symposium on Computer Arithmetic, 1987)

A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor. - Bradley J. Benschneider; William J. Bowhill; Elizabeth M. Copper; Moshe Gavrielov; Paul E. Gronowski; Vijay K. Maheshwari; Victor Peng; Jeffrey D. Pickholtz; Sridhar Samudrala (IEEE J. Solid State Circuits, 1989)

A 200-MHz 64-bit Dual-Issue CMOS Microprocessor. - Daniel W. Dobberpuhl; Richard T. Witek; Randy L. Allmon; Robert Anglin; David Bertucci; Sharon M. Britton; Linda Chao; Robert A. Conrad; Daniel E. Dever; Bruce Gieseke; Soha Hassoun; Gregory W. Hoeppner; et al. (Digit. Tech. J., 1992)

A 200-MHz 64-b dual-issue CMOS microprocessor. - Daniel W. Dobberpuhl; Richard T. Witek; Randy L. Allmon; Robert Anglin; David Bertucci; Sharon M. Britton; Linda Chao; Robert A. Conrad; Daniel E. Dever; Bruce Gieseke; Soha Hassoun; Gregory W. Hoeppner; et al. (IEEE J. Solid State Circuits, 1992)

A 600-MHz superscalar floating-point processor. - John Clouser; Mark Matson; R. Badeau; R. Dupcak; Sridhar Samudrala; Randy L. Allmon; N. Fairbanks (IEEE J. Solid State Circuits, 1999)

Speculative hardware/software co-designed floating-point multiply-add fusion. - Marc Lupon; Enric Gibert; Grigorios Magklis; Sridhar Samudrala; Raúl Martínez; Kyriakos Stavrou; David R. Ditzel (ASPLOS, 2014)

Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto's ET-SoC-1 Chip. - David R. Ditzel; Roger Espasa; Nivard Aymerich; Allen Baum; Tom Berg; Jim Burr; Eric Hao; Jayesh Iyer; Miquel Izquierdo; Shankar Jayaratnam; Darren Jones; Chris Klingner; et al. (HCS, 2021)