Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists. - Srikanth Venkataraman; Ismed Hartanto; W. Kent Fuchs; Elizabeth M. Rudnick; Sreejit Chakravarty; Janak H. Patel (DAC, 1995)

Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. - Sybille Hellebrand; Janusz Rajski; Steffen Tarnick; Srikanth Venkataraman; Bernard Courtois (IEEE Trans. Computers, 1995)

Partial Scan Design Based on Circuit State Information. - Dong Xiang; Srikanth Venkataraman; W. Kent Fuchs; Janak H. Patel (DAC, 1996)

Dynamic diagnosis of sequential circuits based on stuck-at faults. - Srikanth Venkataraman; Ismed Hartanto; W. Kent Fuchs (VTS, 1996)

Diagnostic simulation of stuck-at faults in combinational circuits. - Sreejit Chakravarty; Yiming Gong; Srikanth Venkataraman (J. Electron. Test., 1996)

A deductive technique for diagnosis of bridging faults. - Srikanth Venkataraman; W. Kent Fuchs (ICCAD, 1997)

Diagnosis of Bridging Faults in Sequential Circuits Using Adaptive Simulation, State Storage, and Path-Tracing. - Srikanth Venkataraman; W. Kent Fuchs (ITC, 1997)

Distributed Diagnostic Simulation of Stuck-At Faults in Sequential Circuits. - Srikanth Venkataraman; W. Kent Fuchs (VLSI Design, 1997)

Simulation- and Deduction-Based Techniques for Fault Diagnosis - Srikanth Venkataraman (1997)

Diagnostic Simulation of Sequential Circuits Using Fault Sampling. - Srikanth Venkataraman; W. Kent Fuchs; Janak H. Patel (VLSI Design, 1998)

Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits. - Andreas G. Veneris; Ibrahim N. Hajj; Srikanth Venkataraman; W. Kent Fuchs (VTS, 1999)

POIROT: a logic fault diagnosis tool and its applications. - Srikanth Venkataraman; Scott Brady Drummonds (ITC, 2000)

A Technique for Logic Fault Diagnosis of Interconnect Open Defects. - Srikanth Venkataraman; Scott Brady Drummonds (VTS, 2000)

A technique for fault diagnosis of defects in scan chains. - Ruifeng Guo; Srikanth Venkataraman (ITC, 2001)

On Diagnosing Path Delay Faults in an At-Speed Environment. - Ramesh C. Tekumalla; Srikanth Venkataraman; Jayabrata Ghosh-Dastidar (VTS, 2001)

Poirot: Applications of a Logic Fault Diagnosis Tool. - Srikanth Venkataraman; Scott Brady Drummonds (IEEE Des. Test Comput., 2001)

Diagnostic simulation of stuck-at faults in sequential circuits using compact lists. - Ismed Hartanto; Srikanth Venkataraman; W. Kent Fuchs; Elizabeth M. Rudnick; Janak H. Patel; Sreejit Chakravarty (ACM Trans. Design Autom. Electr. Syst., 2001)

Concurrent Execution of Diagnostic Fault Simulation and Equivalence Identification During Diagnostic Test Generation. - Xiaoming Yu; M. Enamul Amyeen; Srikanth Venkataraman; Ruifeng Guo; Irith Pomeranz (VTS, 2003)

Z-Sets and Z-Detections: Circuit Characteristics that Simplify Fault Diagnosis. - Irith Pomeranz; Srikanth Venkataraman; Sudhakar M. Reddy; Bharath Seshadri (DATE, 2004)

Evaluation of the Quality of N-Detect Scan ATPG Patterns on a Processor. - M. Enamul Amyeen; Srikanth Venkataraman; Ajay Ojha; Sangbong Lee (ITC, 2004)

Z-DFD: Design-for-Diagnosability Based on the Concept of Z-Detection. - Irith Pomeranz; Srikanth Venkataraman; Sudhakar M. Reddy (ITC, 2004)

Diagnosis meets Physical Failure Analysis: What is needed to succeed? - Srikanth Venkataraman (ITC, 2004)

Defect Diagnosis Based on Pattern-Dependent Stuck-At Faults. - Irith Pomeranz; Srikanth Venkataraman; Sudhakar M. Reddy; M. Enamul Amyeen (VLSI Design, 2004)

Razor: A Tool for Post-Silicon Scan ATPG Pattern Debug and Its Application. - Debashis Nayak; Srikanth Venkataraman; Paul J. Thadikaran (VTS, 2004)

An Experimental Study of N-Detect Scan ATPG Patterns on a Processor. - Srikanth Venkataraman; Srihari Sivaraj; M. Enamul Amyeen; Sangbong Lee; Ajay Ojha; Ruifeng Guo (VTS, 2004)

Extraction Error Modeling and Automated Model Debugging in High-Performance Low Power Custom Designs. - Yu-Shen Yang; Andreas G. Veneris; Paul J. Thadikaran; Srikanth Venkataraman (DATE, 2005)

Fault Diagnosis and Fault Model Aliasing. - Irith Pomeranz; Srikanth Venkataraman; Sudhakar M. Reddy (ISVLSI, 2005)

Enabling yield analysis with X-compact. - Zoran Stanojevic; Ruifeng Guo; Subhasish Mitra; Srikanth Venkataraman (ITC, 2005)

Achieving higher yield through diagnosis? - Srikanth Venkataraman (ITC, 2005)

Improving Precision Using Mixed-level Fault Diagnosis. - M. Enamul Amyeen; Debashis Nayak; Srikanth Venkataraman (ITC, 2006)

DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield. - David Abercrombie; Bernd Koenemann; Nagesh Tamarapalli; Srikanth Venkataraman (VLSI Design, 2006)

Evaluation of Test Metrics: Stuck-at, Bridge Coverage Estimate and Gate Exhaustive. - Ruifeng Guo; Subhasish Mitra; M. Enamul Amyeen; Jinkyu Lee; Srihari Sivaraj; Srikanth Venkataraman (VTS, 2006)

Dominance Based Analysis for Large Volume Production Fail Diagnosis. - Bharath Seshadri; Irith Pomeranz; Srikanth Venkataraman; M. Enamul Amyeen; Sudhakar M. Reddy (VTS, 2006)

Accelerating Diagnostic Fault Simulation Using Z-diagnosis and Concurrent Equivalence Identification. - Bharath Seshadri; Xiaoming Yu; Srikanth Venkataraman (VTS, 2006)

An algorithmic technique for diagnosis of faulty scan chains. - Ruifeng Guo; Srikanth Venkataraman (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Extraction error modeling and automated model debugging in high-performance custom designs. - Yu-Shen Yang; Andreas G. Veneris; Paul J. Thadikaran; Srikanth Venkataraman (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Making Manufacturing Work For You. - Srikanth Venkataraman; Ruchir Puri; Steve Griffith; Ankush Oberai; Robert Madge; Greg Yeric; Walter Ng; Yervant Zorian (DAC, 2007)

DFM, DFY, Debug and Diagnosis: The Loop to Ensure Yield. - Srikanth Venkataraman (ISQED, 2007)

Quality Driven Manufacturing and SOC Designs. - Srikanth Venkataraman; Nagesh Nagapalli; Lech Józwiak (ISQED, 2007)

Testing for systematic defects based on DFM guidelines. - Dongok Kim; M. Enamul Amyeen; Srikanth Venkataraman; Irith Pomeranz; Swagato Basumallick; Berni Landau (ITC, 2007)

Using Scan-Dump Values to Improve Functional-Diagnosis Methodology. - Vishnu C. Vimjam; M. Enamul Amyeen; Ruifeng Guo; Srikanth Venkataraman; Michael S. Hsiao; Kai Yang (VTS, 2007)

z-Diagnosis: A Framework for Diagnostic Fault Simulation and Test Generation Utilizing Subsets of Outputs. - Irith Pomeranz; Sudhakar M. Reddy; Srikanth Venkataraman (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Prioritizing the Application of DFM Guidelines Based on the Detectability of Systematic Defects. - Dongok Kim; Irith Pomeranz; M. Enamul Amyeen; Srikanth Venkataraman (ATS, 2008)

DFM / DFT / SiliconDebug / Diagnosis. - Srikanth Venkataraman; Nagesh Tamarapalli (VLSI Design, 2008)

Diagnosis of Scan Clock Failures. - King Leong Lee; Nadir Z. Basturkmen; Srikanth Venkataraman (VTS, 2008)

Microprocessor system failures debug and fault isolation methodology. - M. Enamul Amyeen; Srikanth Venkataraman; Mun Wai Mak (ITC, 2009)

Automated Debug of Speed Path Failures Using Functional Tests. - Richard McLaughlin; Srikanth Venkataraman; Carlston Lim (VTS, 2009)

Defect diagnosis based on DFM guidelines. - Dongok Kim; Irith Pomeranz; M. Enamul Amyeen; Srikanth Venkataraman (VTS, 2010)

Logic BIST silicon debug and volume diagnosis methodology. - M. Enamul Amyeen; Andal Jayalakshmi; Srikanth Venkataraman; Sundar V. Pathy; Ewe C. Tan (ITC, 2011)

Tutorial T3: DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield. - Srikanth Venkataraman; Nagesh Tamarapalli (VLSI Design, 2012)

Panel session what is the electronics industry doing to win the battle against the expected scary failure rates in future technology nodes? - Said Hamdioui; Davide Appello; Arnaud Grasset; Xinli Gu; Bram Kruseman; Riccardo Mariani; Hermann Obermeir; Srikanth Venkataraman (ETS, 2013)

Built-in generation of functional broadside tests considering primary input constraints. - Bo Yao 002; Irith Pomeranz; Srikanth Venkataraman; M. Enamul Amyeen (ACM Great Lakes Symposium on VLSI, 2014)

A Joint Diagnostic Test Generation Procedure with Dynamic Test Compaction. - M. Enamul Amyeen; Irith Pomeranz; Srikanth Venkataraman (ATS, 2016)

A novel diagnostic test generation methodology and its application in production failure isolation. - M. Enamul Amyeen; Dongok Kim; Maheshwar Chandrasekar; Mohammad Noman; Srikanth Venkataraman; Anurag Jain; Neha Goel; Ramesh Sharma (ITC, 2016)

Reduction of diagnostic fail data volume and tester time using a dynamic N-cover algorithm. - Shraddha Bodhe; M. Enamul Amyeen; Clariza Galendez; Houston Mooers; Irith Pomeranz; Srikanth Venkataraman (VTS, 2016)

Diagnostic Fail Data Minimization Using an N-Cover Algorithm. - Shraddha Bodhe; M. Enamul Amyeen; Irith Pomeranz; Srikanth Venkataraman (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Test reordering for improved scan chain diagnosis using an enhanced defect diagnosis procedure. - Srikanth Venkataraman; Irith Pomeranz; Shraddha Bodhe; M. Enamul Amyeen (ITC, 2017)

Test Modification for Reduced Volumes of Fail Data. - Irith Pomeranz; M. Enamul Amyeen; Srikanth Venkataraman (ACM Trans. Design Autom. Electr. Syst., 2017)

Reordering Tests for Efficient Fail Data Collection and Tester Time Reduction. - Shraddha Bodhe; Irith Pomeranz; M. Enamul Amyeen; Srikanth Venkataraman (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Improving the Resolution of Multiple Defect Diagnosis by Removing and Selecting Tests. - Naixing Wang; Irith Pomeranz; Brady Benware; M. Enamul Amyeen; Srikanth Venkataraman (DFT, 2018)

Interconnect-aware tests to complement gate-exhaustive tests. - Irith Pomeranz; Srikanth Venkataraman (ETS, 2018)

DPPM Reduction Methods and New Defect Oriented Test Methods Applied to Advanced FinFET Technologies. - Will Howell; Friedrich Hapke; Edward Brazil; Srikanth Venkataraman; R. Datta; Andreas Glowatz; Wilfried Redemund; J. Schmerberg; Anja Fast; Janusz Rajski (ITC, 2018)

Resynthesis for Avoiding Undetectable Faults Based on Design-for-Manufacturability Guidelines. - Naixing Wang; Irith Pomeranz; Sudhakar M. Reddy; Arani Sinha; Srikanth Venkataraman (DATE, 2019)

Observation Point Placement for Improved Logic Diagnosis based on Large Sets of Candidate Faults. - Irith Pomeranz; Vivek Chickermane; Srikanth Venkataraman (VTS, 2019)

Layout Resynthesis by Applying Design-for-manufacturability Guidelines to Avoid Low-coverage Areas of a Cell-based Design. - Naixing Wang; Irith Pomeranz; Sudhakar M. Reddy; Arani Sinha; Srikanth Venkataraman (ACM Trans. Design Autom. Electr. Syst., 2019)

Automating Design For Yield: Silicon Learning to Predictive Models and Design Optimization. - Srikanth Venkataraman; Pongpachara Limpisathian; Pascal Meinerzhagen; Suriyaprakash Natarajan; Eric Yang (ITC, 2020)

LFSR-Based Test Generation for Reduced Fail Data Volume. - Irith Pomeranz; Srikanth Venkataraman (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Defect-Oriented Test: Effectiveness in High Volume Manufacturing. - Friedrich Hapke; Will Howell; Peter C. Maxwell; Edward Brazil; Srikanth Venkataraman; Rudrajit Dutta; Andreas Glowatz; Anja Fast; Janusz Rajski (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Using Fault Detection Tests to Produce Diagnostic Tests Targeting Large Sets of Candidate Faults. - Hari Addepalli; Irith Pomeranz; M. Enamul Amyeen; Suriyaprakash Natarajan; Arani Sinha; Srikanth Venkataraman (ATS, 2022)

Generating Storage-Aware Test Sets Targeting Several Fault Models. - Hari Addepalli; Irith Pomeranz; M. Enamul Amyeen; Suriyaprakash Natarajan; Arani Sinha; Srikanth Venkataraman (ISVLSI, 2024)