A Monte Carlo study , of Electron Transport in Strained Si/SiGe Heterostructures. - Mahbub Rashed; Wei-Kai Shih; Srinivas Jallepalli; R. Zaman; Thomas J. T. Kwan; Christine M. Maziar (VLSI Design, 1998)

Study of Electron Velocity Overshoot in NMOS Inversion Layers. - Wei-Kai Shih; Srinivas Jallepalli; Mahbub Rashed; Christine M. Maziar; A. F. Tasch Jr. (VLSI Design, 1998)

A Monte Carlo Study of Electron Transport in Silicon nMOSFET Inversion Layers. - Wei-Kai Shih; Srinivas Jallepalli; C.-F. Yeap; Mahbub Rashed; Christine M. Maziar; A. F. Tasch Jr. (VLSI Design, 1998)

Employing Scaled Sigma Sampling for Efficient Estimation of Rare Event Probabilities in the Absence of Input Domain Mapping. - Srinivas Jallepalli; Ram Mooraka; Sanjay Parihar; Earl Hunter; Elie Maalouf (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Rapid Assessment of Design Sensitivity to Process Excursions via Scaled Sigma Sampling. - Srinivas Jallepalli; Ram Mooraka; Sanjay Parihar; Earl Hunter; Elie Maalouf (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Machine Learning for High Sigma Analog Designs (Invited). - Srinivas Jallepalli (MLCAD, 2024)