Scaling challenges of FinFET technology at advanced nodes and its impact on SoC design (Invited). - Srinivasa Banna (CICC, 2015)

Tier partitioning strategy to mitigate BEOL degradation and cost issues in monolithic 3D ICs. - Sandeep Kumar Samal; Deepak Nayak; Motoi Ichihashi; Srinivasa Banna; Sung Kyu Lim (ICCAD, 2016)

How to Cope with Slow Transistors in the Top-tier of Monolithic 3D ICs: Design Studies and CAD Solutions. - Sandeep Kumar Samal; Deepak Nayak; Motoi Ichihashi; Srinivasa Banna; Sung Kyu Lim (ISLPED, 2016)

On the Design of Ultra-High Density 14nm Finfet Based Transistor-Level Monolithic 3D ICs. - Jiajun Shi; Deepak Nayak; Motoi Ichihashi; Srinivasa Banna; Csaba Andras Moritz (ISVLSI, 2016)

32GHz resonant-fin transistors in 14nm FinFET technology. - Bichoy Bahr; Yanbo He; Zoran Krivokapic; Srinivasa Banna; Dana Weinstein (ISSCC, 2018)