SUNMAP: a tool for automatic topology selection and generation for NoCs. - Srinivasan Murali; Giovanni De Micheli (DAC, 2004)

×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip. - Antoine Jalabert; Srinivasan Murali; Luca Benini; Giovanni De Micheli (DATE, 2004)

Bandwidth-Constrained Mapping of Cores onto NoC Architectures. - Srinivasan Murali; Giovanni De Micheli (DATE, 2004)

Mapping and physical planning of networks-on-chip architectures with quality-of-service guarantees. - Srinivasan Murali; Luca Benini; Giovanni De Micheli (ASP-DAC, 2005)

Performance driven reliable link design for networks on chips. - Rutuparna Tamhankar; Srinivasan Murali; Giovanni De Micheli (ASP-DAC, 2005)

An Application-Specific Design Methodology for STbus Crossbar Generation. - Srinivasan Murali; Giovanni De Micheli (DATE, 2005)

Design Methodologies and CAD Tool Flows for Networks on Chips. - Srinivasan Murali (SoC, 2005)

Analysis of Error Recovery Schemes for Networks on Chips. - Srinivasan Murali; Theo Theocharides; Narayanan Vijaykrishnan; Mary Jane Irwin; Luca Benini; Giovanni De Micheli (IEEE Des. Test Comput., 2005)

NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip. - Davide Bertozzi; Antoine Jalabert; Srinivasan Murali; Rutuparna Tamhankar; Stergios Stergiou; Luca Benini; Giovanni De Micheli (IEEE Trans. Parallel Distributed Syst., 2005)

Mapping and configuration methods for multi-use-case networks on chips. - Srinivasan Murali; Martijn Coenen; Andrei Radulescu; Kees Goossens; Giovanni De Micheli (ASP-DAC, 2006)

A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control. - Martijn Coenen; Srinivasan Murali; Andrei Radulescu; Kees Goossens; Giovanni De Micheli (CODES+ISSS, 2006)

A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip. - Srinivasan Murali; David Atienza; Luca Benini; Giovanni De Micheli (DAC, 2006)

A methodology for mapping multiple use-cases onto networks on chips. - Srinivasan Murali; Martijn Coenen; Andrei Radulescu; Kees Goossens; Giovanni De Micheli (DATE, 2006)

Designing application-specific networks on chips with floorplan information. - Srinivasan Murali; Paolo Meloni; Federico Angiolini; David Atienza; Salvatore Carta; Luca Benini; Giovanni De Micheli; Luigi Raffo (ICCAD, 2006)

Reliability Support for On-Chip Memories Using Networks-on-Chip. - Federico Angiolini; David Atienza; Srinivasan Murali; Luca Benini; Giovanni De Micheli (ICCD, 2006)

Comparison of a Timing-Error Tolerant Scheme with a Traditional Re-transmission Mechanism for Networks on Chips. - Srinivasan Murali; Rutuparna Tamhankar; Federico Angiolini; Antonio Pullini; David Atienza; Luca Benini; Giovanni De Micheli (SoC, 2006)

Routing Aware Switch Hardware Customization for Networks on Chips. - Paolo Meloni; Srinivasan Murali; Salvatore Carta; Massimo Camplani; Luigi Raffo; Giovanni De Micheli (Nano-Net, 2006)

Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips. - Srinivasan Murali; Paolo Meloni; Federico Angiolini; David Atienza; Salvatore Carta; Luca Benini; Giovanni De Micheli; Luigi Raffo (VLSI-SoC, 2006)

Designing Routing and Message-Dependent Deadlock Free Networks on Chips. - Srinivasan Murali; Paolo Meloni; Federico Angiolini; David Atienza; Salvatore Carta; Luca Benini; Giovanni De Micheli; Luigi Raffo (VLSI-SoC (Selected Papers), 2006)

Temperature-aware processor frequency assignment for MPSoCs using convex optimization. - Srinivasan Murali; Almir Mutapcic; David Atienza; Rajesh Gupta 001; Stephen P. Boyd; Giovanni De Micheli (CODES+ISSS, 2007)

NoC Design and Implementation in 65nm Technology. - Antonio Pullini; Federico Angiolini; Paolo Meloni; David Atienza; Srinivasan Murali; Luigi Raffo; Giovanni De Micheli; Luca Benini (NOCS, 2007)

Early wire characterization for predictable network-on-chip global interconnects. - Ilhan Hatirnaz; Stéphane Badel; Nuria Pazos; Yusuf Leblebici; Srinivasan Murali; David Atienza; Giovanni De Micheli (SLIP, 2007)

Bringing NoCs to 65 nm. - Antonio Pullini; Federico Angiolini; Srinivasan Murali; David Atienza; Giovanni De Micheli; Luca Benini (IEEE Micro, 2007)

An Application-Specific Design Methodology for On-Chip Crossbar Generation. - Srinivasan Murali; Luca Benini; Giovanni De Micheli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Timing-Error-Tolerant Network-on-Chip Design Methodology. - Rutuparna Tamhankar; Srinivasan Murali; Stergios Stergiou; Antonio Pullini; Federico Angiolini; Luca Benini; Giovanni De Micheli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors. - Srinivasan Murali; David Atienza; Paolo Meloni; Salvatore Carta; Luca Benini; Giovanni De Micheli; Luigi Raffo (IEEE Trans. Very Large Scale Integr. Syst., 2007)

A Method for Routing Packets Across Multiple Paths in NoCs with In-Order Delivery and Fault-Tolerance Gaurantees. - Srinivasan Murali; David Atienza; Luca Benini; Giovanni De Micheli (VLSI Design, 2007)

Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization. - Srinivasan Murali; Almir Mutapcic; David Atienza; Rajesh Gupta 001; Stephen P. Boyd; Luca Benini; Giovanni De Micheli (DATE, 2008)

Network-on-Chip design and synthesis outlook. - David Atienza; Federico Angiolini; Srinivasan Murali; Antonio Pullini; Luca Benini; Giovanni De Micheli (Integr., 2008)

Synthesis of networks on chips for 3D systems on chips. - Srinivasan Murali; Ciprian Seiculescu; Luca Benini; Giovanni De Micheli (ASP-DAC, 2009)

Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems. - Vincenzo Rana; Srinivasan Murali; David Atienza; Marco D. Santambrogio; Luca Benini; Donatella Sciuto (CODES+ISSS, 2009)

NoC topology synthesis for supporting shutdown of voltage islands in SoCs. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (DAC, 2009)

SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (DATE, 2009)

A method for calculating hard QoS guarantees for Networks-on-Chip. - Dara Rahmati; Srinivasan Murali; Luca Benini; Federico Angiolini; Giovanni De Micheli; Hamid Sarbazi-Azad (ICCAD, 2009)

A floorplan-aware interactive tool flow for NoC design and synthesis. - Mohammad Reza Kakoee; Federico Angiolini; Srinivasan Murali; Antonio Pullini; Ciprian Seiculescu; Luca Benini (SoCC, 2009)

Processor Speed Control With Thermal Constraints. - Almir Mutapcic; Stephen P. Boyd; Srinivasan Murali; David Atienza; Giovanni De Micheli; Rajesh Gupta 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Designing Reliable and Efficient Networks on Chips - Srinivasan Murali (Springer, 2009)

Design of networks on chips for 3D ICs. - Srinivasan Murali; Luca Benini; Giovanni De Micheli (ASP-DAC, 2010)

Networks on Chips: from research to products. - Giovanni De Micheli; Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Federico Angiolini; Antonio Pullini (DAC, 2010)

A method to remove deadlocks in Networks-on-Chips with Wormhole flow control. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (DATE, 2010)

SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Comparative Analysis of NoCs for Two-Dimensional Versus Three-Dimensional SoCs Supporting Multiple Voltage and Frequency Islands. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Design and Analysis of NoCs for Low-Power 2D and 3D SoCs. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (Low Power Networks-on-Chip, 2011)

A Method for Integrating Network-on-Chip Topologies with 3D ICs. - M. Pawan Kumar; Anish S. Kumar; Srinivasan Murali; Luca Benini; Kamakoti Veezhinathan (ISVLSI, 2011)

A Simulation Based Buffer Sizing Algorithm for Network on Chips. - Anish S. Kumar; M. Pawan Kumar; Srinivasan Murali; V. Kamakoti 001; Luca Benini; Giovanni De Micheli (ISVLSI, 2011)

A DRAM Centric NoC Architecture and Topology Design Approach. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (ISVLSI, 2011)

3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (3D Integration for NoC-based SoC Architectures, 2011)

A Buffer-Sizing Algorithm for Network-on-Chips with Multiple Voltage-Frequency Islands. - Anish S. Kumar; M. Pawan Kumar; Srinivasan Murali; V. Kamakoti 001; Luca Benini; Giovanni De Micheli (J. Electr. Comput. Eng., 2012)

Computing Accurate Performance Bounds for Best Effort Networks-on-Chip. - Dara Rahmati; Srinivasan Murali; Luca Benini; Federico Angiolini; Giovanni De Micheli; Hamid Sarbazi-Azad (IEEE Trans. Computers, 2013)

Designing best effort networks-on-chip to meet hard latency constraints. - Ciprian Seiculescu; Dara Rahmati; Srinivasan Murali; Hamid Sarbazi-Azad; Luca Benini; Giovanni De Micheli (ACM Trans. Embed. Comput. Syst., 2013)

Ultra-Low Power Design of Wearable Cardiac Monitoring Systems. - Rubén Braojos; Hossein Mamaghanian; Alair Dias Junior; Giovanni Ansaloni; David Atienza; Francisco J. Rincón; Srinivasan Murali (DAC, 2014)

A Wearable Device for Physical and Emotional Health Monitoring. - Srinivasan Murali; Francisco J. Rincón; David Atienza (CinC, 2015)

Real-Time Probabilistic Heart-Beat Classification and Correction for Embedded Systems. - Grégoire Surrel; Francisco J. Rincón; Srinivasan Murali; David Atienza (CinC, 2015)

Estimation of Blood Pressure and Pulse Transit Time Using Your Smartphone. - Alair Dias Junior; Srinivasan Murali; Francisco J. Rincón; David Atienza (DSD, 2015)

Energy-aware embedded classifier design for real-time emotion analysis. - Manoj Padmanabhan; Srinivasan Murali; Francisco J. Rincón; David Atienza (EMBC, 2015)

Design of ultra-low-power smart wearable systems. - Grégoire Surrel; Francisco J. Rincón; Srinivasan Murali; David Atienza (LATS, 2015)

Touch-based system for beat-to-beat impedance cardiogram acquisition and hemodynamic parameters estimation. - Dionisije Sopic; Srinivasan Murali; Francisco J. Rincón; David Atienza (DATE, 2016)

Ultra-Low Power Estimation of Heart Rate Under Physical Activity Using a Wearable Photoplethysmographic System. - Elisabetta De Giovanni; Srinivasan Murali; Francisco J. Rincón; David Atienza (DSD, 2016)

Low-Power Wearable System for Real-Time Screening of Obstructive Sleep Apnea. - Grégoire Surrel; Francisco J. Rincón; Srinivasan Murali; David Atienza (ISVLSI, 2016)

Methods for reliable estimation of pulse transit time and blood pressure variations using smartphone sensors. - Alair Dias Junior; Srinivasan Murali; Francisco J. Rincón; David Atienza (Microprocess. Microsystems, 2016)

Online Obstructive Sleep Apnea Detection on Medical Wearable Sensors. - Grégoire Surrel; Amir Aminifar; Francisco J. Rincón; Srinivasan Murali; David Atienza (IEEE Trans. Biomed. Circuits Syst., 2018)

Harnessing the Ambient Radio Frequency Noise for Wearable Device Pairing. - Wenqiang Jin; Ming Li 006; Srinivasan Murali; Linke Guo (CCS, 2020)

Towards 3D human pose construction using wifi. - Wenjun Jiang; Hongfei Xue; Chenglin Miao; Shiyang Wang; Sen Lin 009; Chong Tian; Srinivasan Murali; Haochen Hu; Zhi Sun; Lu Su 001 (MobiCom, 2020)

BlinKey: A Two-Factor User Authentication Method for Virtual Reality Devices. - Huadi Zhu; Wenqiang Jin; Mingyan Xiao; Srinivasan Murali; Ming Li 006 (Proc. ACM Interact. Mob. Wearable Ubiquitous Technol., 2020)

Periscope: A Keystroke Inference Attack Using Human Coupled Electromagnetic Emanations. - Wenqiang Jin; Srinivasan Murali; Huadi Zhu; Ming Li 006 (CCS, 2021)

CycleGuard: A Smartphone-based Assistive Tool for Cyclist Safety Using Acoustic Ranging. - Wenqiang Jin; Srinivasan Murali; YoungTak Cho; Huadi Zhu; Tianhao Li; Rachael Thompson Panik; Anika Rimu; Shuchisnigdha Deb; Kari E. Watkins; Xu Yuan 001; Ming Li 006 (Proc. ACM Interact. Mob. Wearable Ubiquitous Technol., 2021)

EyeQoE: A Novel QoE Assessment Model for 360-degree Videos Using Ocular Behaviors. - Huadi Zhu; Tianhao Li; Chaowei Wang; Wenqiang Jin; Srinivasan Murali; Mingyan Xiao; Dongqing Ye; Ming Li 006 (Proc. ACM Interact. Mob. Wearable Ubiquitous Technol., 2022)

Continuous Authentication Using Human-Induced Electric Potential. - Srinivasan Murali; Wenqiang Jin; Vighnesh Sivaraman; Huadi Zhu; Tianxi Ji; Pan Li 001; Ming Li 006 (ACSAC, 2023)

Adversarial Robustness of Deep Learning Models for Inland Water Body Segmentation from SAR Images. - Siddharth Kothari; Srinivasan Murali; Sankalp Kothari; Ujjwal Verma; Jaya Sreevalsan-Nair (CoRR, 2025)