Gbit/s Non-Binary LDPC Decoders: High-Throughput using High-Level Specifications. - Oscar Ferraz; Srinivasan Subramaniyan; Guohui Wang; Joseph R. Cavallaro; Gabriel Falcão 001; Madhura Purnaprajna (FCCM, 2020)

Pushing the Limits of Energy Efficiency for Non-Binary LDPC Decoders on GPUs and FPGAs. - Srinivasan Subramaniyan; Oscar Ferraz; M. R. Ashuthosh; Santosh Krishna; Guohui Wang; Joseph R. Cavallaro; Vítor Silva 001; Gabriel Falcão 001; Madhura Purnaprajna (SiPS, 2020)

MAPPARAT: A Resource Constrained FPGA-Based Accelerator for Sparse-Dense Matrix Multiplication. - M. R. Ashuthosh; Santosh Krishna; Vishvas Sudarshan; Srinivasan Subramaniyan; Madhura Purnaprajna (VLSID, 2022)

A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA, and GPU Architectures. - Oscar Ferraz; Srinivasan Subramaniyan; Ramesh Chinthalaa; João Andrade; Joseph R. Cavallaro; Soumitra Kumar Nandy; Vítor Silva 001; Xinmiao Zhang 001; Madhura Purnaprajna; Gabriel Falcão 001 (IEEE Commun. Surv. Tutorials, 2022)

OptiCPD: Optimization For The Canonical Polyadic Decomposition Algorithm on GPUs. - Srinivasan Subramaniyan; Xiaorui Wang (IPDPS Workshops, 2023)

Enabling High-Level Design Strategies for High-Throughput and Low-Power NB-LDPC Decoders. - Srinivasan Subramaniyan; Oscar Ferraz; M. R. Ashuthosh; Santosh Krishna; Guohui Wang; Joseph R. Cavallaro; Vítor Silva 001; Gabriel Falcão 001; Madhura Purnaprajna (IEEE Des. Test, 2023)

Latency-Guaranteed Co-Location of Inference and Training for Reducing Data Center Expenses. - Guoyu Chen; Srinivasan Subramaniyan; Xiaorui Wang (ICDCS, 2024)