aSOC: A Scalable, Single-Chip Communications Architecture. - Jian Liang; Sriram Swaminathan; Russell Tessier (IEEE PACT, 2000)

Area-Optimized Technology Mapping for Hybrid FPGAs. - Srini Krishnamoorthy; Sriram Swaminathan; Russell Tessier (FPL, 2000)

Dynamically parameterized algorithms and architectures to exploit signal variations for improved performance and reduced power. - Wayne P. Burleson; Russell Tessier; Dennis Goeckel; Sriram Swaminathan; Prashant Jain; Jeongseon Euh; Subramanian Venkatraman; Vidhya Thyagarajan (ICASSP, 2001)

A dynamically reconfigurable adaptive viterbi decoder. - Sriram Swaminathan; Russell Tessier; Dennis Goeckel; Wayne P. Burleson (FPGA, 2002)

A reconfigurable, power-efficient adaptive Viterbi decoder. - Russell Tessier; Sriram Swaminathan; Ramaswamy Ramaswamy; Dennis Goeckel; Wayne P. Burleson (IEEE Trans. Very Large Scale Integr. Syst., 2005)