Fast & Energy Efficient Binary to BCD Converter with Complement Based Logic Design (CBLD) for BCD Multipliers. - Ashish Joshi; Srirathan Rangisetti; Priyanka Lohray; Tooraj Nikoubin (CCWC, 2019)

Rounding Technique Analysis for Power-Area & Energy Efficient Approximate Multiplier Design. - Priyanka Lohray; Satwik Gali; Srirathan Rangisetti; Tooraj Nikoubin (CCWC, 2019)