Power invariant secure IC design methodology using reduced complementary dynamic and differential logic. - Vijay Sundaresan; Srividhya Rammohan; Ranga Vemuri (VLSI-SoC, 2007)

Reduced Complementary Dynamic and Differential Logic: A CMOS Logic Style for DPA-Resistant Secure IC Design. - Srividhya Rammohan; Vijay Sundaresan; Ranga Vemuri (VLSI Design, 2008)