Delay Insensitive Logic for RSFQ Superconductor Technology. - Priyadarsan Patra; Stanislav Polonsky; Donald S. Fussell (ASYNC, 1997)

Primitive-Level Pipelining Method on Delay-Insensitive Model for RSFQ Pulse-Driven Logic. - Yoshio Kameda; Stanislav Polonsky; Masaaki Maezawa; Takashi Nanya (ASYNC, 1998)

The attack of the "Holey Shmoos": a case study of advanced DFD and picosecond imaging circuit analysis (PICA). - William V. Huott; Moyra K. McManus; Daniel R. Knebel; Steve Steen; Dennis Manzer; Pia N. Sanda; Steven C. Wilson; Yuen H. Chan; Antonio Pelella; Stanislav Polonsky (ITC, 1999)

Non-invasive timing analysis of IBM G6 microprocessor L1 cache using picosecond imaging circuit analysis. - Stanislav Polonsky; Moyra K. McManus; Daniel R. Knebel; Steve Steen; Pia N. Sanda (Asian Test Symposium, 2000)