Design of a Fully Parallel Viterbi Decoder. - Jens Sparsø; Steen Pedersen; Erik Paaske (VLSI, 1991)

An area-efficient path memory structure for VLSI implementation of high speed Viterbi decoders. - Erik Paaske; Steen Pedersen; Jens Sparsø (Integr., 1991)

An area-efficient topology for VLSI implementation of Viterbi decoders and other shuffle-exchange type structures. - Jens Sparsø; Henrik N. Jorgensen; Erik Paaske; Steen Pedersen; Thomas Rubner-Petersen (IEEE J. Solid State Circuits, 1991)

The importance of interfaces: a HW/SW codesign case study. - D. C. R. Jensen; Jan Madsen; Steen Pedersen (CODES, 1997)

Memory architecture for efficient utilization of SDRAM: a case study of the computation/memory access trade-off. - Thomas Gleerup; Hans Holten-Lund; Jan Madsen; Steen Pedersen (CODES, 2000)

VRML visualization in a surgery planning and diagnostics application. - Hans Holten-Lund; Mogens Hvidtfeldt; Jan Madsen; Steen Pedersen (Web3D, 2000)

National supercomputing in Denmark. - Lene Krøl Andersen; Birgitte Vedel Thage; Ali Syed; Bjarne Andersen; Peter Løngreen; Kurt Gammelgaard Nielsen; Steen Pedersen (MIPRO, 2018)