A symbolic core approach to the formal verification of integrated mixed-mode applications. - Stefan Hendricx; Luc J. M. Claesen (ED&TC, 1997)

Verification of Finite-State-Machine Refinements Using a Symbolic Methodology. - Stefan Hendricx; Luc J. M. Claesen (CHARME, 1999)

Formally Verified Redundancy Removal. - Stefan Hendricx; Luc J. M. Claesen (DATE, 1999)

Symbolic Multi-Level Verification of Refinement. - Stefan Hendricx; Luc J. M. Claesen (Great Lakes Symposium on VLSI, 1999)