A Sequential Learning Resource Allocation Network for Image Processing Applications. - Stefan Wildermann; Jürgen Teich (HIS, 2008)

3D Person Tracking with a Color-Based Particle Filter. - Stefan Wildermann; Jürgen Teich (RobVis, 2008)

Co-design Architecture and Implementation for Point-Based Rendering on FPGAs. - Mateusz Majer; Stefan Wildermann; Josef Angermeier; Stefan Hanke; Jürgen Teich (IEEE International Workshop on Rapid System Prototyping, 2008)

CAN+: A new backward-compatible Controller Area Network (CAN) protocol with up to 16× higher data rates. - Tobias Ziermann; Stefan Wildermann; Jürgen Teich (DATE, 2009)

Self-organizing multi-cue fusion for FPGA-based embedded imaging. - Stefan Wildermann; Gregor Walla; Tobias Ziermann; Jürgen Teich (FPL, 2009)

Self-organizing Bandwidth Sharing in Priority-Based Medium Access. - Stefan Wildermann; Tobias Ziermann; Jürgen Teich (SASO, 2009)

Self-organizing Computer Vision for Robust Object Tracking in Smart Cameras. - Stefan Wildermann; Andreas Oetken; Jürgen Teich; Zoran A. Salcic (ATC, 2010)

A Bus-Based SoC Architecture for Flexible Module Placement on Reconfigurable FPGAs. - Andreas Oetken; Stefan Wildermann; Jürgen Teich; Dirk Koch (FPL, 2010)

A Self-Organizing Distributed Reinforcement Learning Algorithm to Achieve Fair Bandwidth Allocation for Priority-Based Bus Communication. - Tobias Ziermann; Nina Mühleis; Stefan Wildermann; Jürgen Teich (ISORC Workshops, 2010)

Placing Streaming Applications with Similarities on Dynamically Partially Reconfigurable Architectures. - Josef Angermeier; Stefan Wildermann; Eugen Sibirko; Jürgen Teich (ReConFig, 2010)

OrganicBus: Organic Self-organising Bus-Based Communication Systems. - Tobias Ziermann; Stefan Wildermann; Jürgen Teich (Organic Computing, 2011)

Symbolic design space exploration for multi-mode reconfigurable systems. - Stefan Wildermann; Felix Reimann; Daniel Ziener; Jürgen Teich (CODES+ISSS, 2011)

Unifying Partitioning and Placement for SAT-Based Exploration of Heterogeneous Reconfigurable SoCs. - Stefan Wildermann; Jürgen Teich; Daniel Ziener (FPL, 2011)

Operational mode exploration for reconfigurable systems with multiple applications. - Stefan Wildermann; Felix Reimann; Jürgen Teich; Zoran Salcic (FPT, 2011)

Dynamic decentralized mapping of tree-structured applications on NoC architectures. - Andreas Weichslgartner; Stefan Wildermann; Jürgen Teich (NOCS, 2011)

Distributed self-organizing bandwidth allocation for priority-based bus communication. - Tobias Ziermann; Stefan Wildermann; Nina Mühleis; Jürgen Teich (Concurr. Comput. Pract. Exp., 2012)

Placing Multimode Streaming Applications on Dynamically Partially Reconfigurable Architectures. - Stefan Wildermann; Josef Angermeier; Eugen Sibirko; Jürgen Teich (Int. J. Reconfigurable Comput., 2012)

Systematic design of self-adaptive embedded systems with applications in image processing. - Stefan Wildermann (2012)

Game-theoretic analysis of decentralized core allocation schemes on many-core systems. - Stefan Wildermann; Tobias Ziermann; Jürgen Teich (DATE, 2013)

Symbolic system-level design methodology for multi-mode reconfigurable systems. - Stefan Wildermann; Felix Reimann; Daniel Ziener; Jürgen Teich (Des. Autom. Embed. Syst., 2013)

DAARM: Design-time application analysis and run-time mapping for predictable execution in many-core systems. - Andreas Weichslgartner; Deepak Gangadharan; Stefan Wildermann; Michael Glaß; Jürgen Teich (CODES+ISSS, 2014)

Multi-objective distributed run-time resource management for many-cores. - Stefan Wildermann; Michael Glaß; Jürgen Teich (DATE, 2014)

Self-Integration for Virtualization of Embedded Many-Core Systems. - Stefan Wildermann; Jürgen Teich (SASO Workshops, 2014)

Invasive computing for predictable stream processing: a simulation-based case study. - Sascha Roloff; Stefan Wildermann; Frank Hannig; Jürgen Teich (ESTIMedia, 2015)

Design Methodology and Run-Time Management for Predictable Many-Core Systems. - Stefan Wildermann; Andreas Weichslgartner; Jürgen Teich (ISORC Workshops, 2015)

A LUT-Based Approximate Adder. - Andreas Becher; Jorge Echavarria; Daniel Ziener; Stefan Wildermann; Jürgen Teich (FCCM, 2016)

FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs. - Jorge Echavarria; Stefan Wildermann; Andreas Becher; Jürgen Teich; Daniel Ziener (FPT, 2016)

Language and Compilation of Parallel Programs for *-Predictable MPSoC Execution Using Invasive Computing. - Jürgen Teich; Michael Glaß; Sascha Roloff; Wolfgang Schröder-Preikschat; Gregor Snelting; Andreas Weichslgartner; Stefan Wildermann (MCSoC, 2016)

ActorX10: an actor library for X10. - Sascha Roloff; Alexander Pöppl; Tobias Schwarzer; Stefan Wildermann; Michael Bader; Michael Glaß; Frank Hannig; Jürgen Teich (X10@PLDI, 2016)

Hybrid energy-aware reconfiguration management on Xilinx Zynq SoCs. - Andreas Becher; Jutta Pirkl; Achim Herrmann; Jürgen Teich; Stefan Wildermann (ReConFig, 2016)

ReOrder: Runtime datapath generation for high-throughput multi-stream processing. - Andreas Becher; Stefan Wildermann; Moritz Mühlenthaler; Jürgen Teich (ReConFig, 2016)

Design-Time/Run-Time Mapping of Security-Critical Applications in Heterogeneous MPSoCs. - Andreas Weichslgartner; Stefan Wildermann; Johannes Götzfried; Felix C. Freiling; Michael Glaß; Jürgen Teich (SCOPES, 2016)

Providing security on demand using invasive computing. - Gabor Drescher; Christoph Erhardt; Felix C. Freiling; Johannes Götzfried; Daniel Lohmann; Pieter Maene; Tilo Müller; Ingrid Verbauwhede; Andreas Weichslgartner; Stefan Wildermann (it Inf. Technol., 2016)

Invasive computing for timing-predictable stream processing on MPSoCs. - Stefan Wildermann; Michael Bader; Lars Bauer; Marvin Damschen; Dirk Gabriel; Michael Gerndt; Michael Glaß; Jörg Henkel; Johny Paul; Alexander Pöppl; Sascha Roloff; Tobias Schwarzer; et al. (it Inf. Technol., 2016)

High-Level Synthesis for Hardware/Software Co-Design of Distributed Smart Camera Systems. - Franz-Josef Streit; Martín Letras; Matthias Schid; Joachim Falk; Stefan Wildermann; Jürgen Teich (ICDSC, 2017)

Predictable run-time mapping reconfiguration for real-time applications on many-core systems. - Behnaz Pourmohseni; Stefan Wildermann; Michael Glaß; Jürgen Teich (RTNS, 2017)

Exploiting Predictability in Dynamic Network Communication for Power-Efficient Data Transmission in LTE Radio Systems. - Peter Brand; Jonathan Ah Sue; Johannes Brendel; Joachim Falk; Ralph Hasholzner; Jürgen Teich; Stefan Wildermann (SCOPES, 2017)

Automatic Conversion of Simulink Models to SysteMoC Actor Networks. - Martín Letras; Joachim Falk; Stefan Wildermann; Jürgen Teich (SCOPES, 2017)

Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics. - Jutta Pirkl; Andreas Becher; Jorge Echavarria; Jürgen Teich; Stefan Wildermann (SCOPES, 2017)

Towards the co-evolution of industrial products and its production systems by combining models from development and hardware/software deployment in cyber-physical systems. - Birgit Vogel-Heuser; Stefan Wildermann; Jürgen Teich (Prod. Eng., 2017)

Invasive Computing for Mapping Parallel Programs to Many-Core Architectures. - Andreas Weichslgartner; Stefan Wildermann; Michael Glaß; Jürgen Teich (Springer, 2018)

Architecture decomposition in system synthesis of heterogeneous many-core systems. - Valentina Richthammer; Tobias Schwarzer; Stefan Wildermann; Jürgen Teich; Michael Glaß (DAC, 2018)

Optimistic regular expression matching on FPGAs for near-data processing. - Andreas Becher; Stefan Wildermann; Jürgen Teich (DaMoN, 2018)

AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs. - Jorge Echavarria; Stefan Wildermann; Jürgen Teich (FPT, 2018)

Design space exploration of multi-output logic function approximations. - Jorge Echavarria; Stefan Wildermann; Jürgen Teich (ICCAD, 2018)

Dynamic resource management for heterogeneous many-cores. - Jörg Henkel; Jürgen Teich; Stefan Wildermann; Hussam Amrouch (ICCAD, 2018)

Can Approximate Computing Reduce Power Consumption on FPGAs? - Jorge Echavarria; Katja Schutz; Andreas Becher; Stefan Wildermann; Jürgen Teich (ICECS, 2018)

On the Complexity of Mapping Feasibility in Many-Core Architectures. - Tobias Schwarzer; Sascha Roloff; Valentina Richthammer; Rami Khaldi; Stefan Wildermann; Michael Glaß; Jürgen Teich (MCSoC, 2018)

Model-Based Design Automation of Hardware/Software Co-Designs for Xilinx Zynq PSoCs. - Franz-Josef Streit; Martín Letras; Stefan Wildermann; Benjamin Hackenberg; Joachim Falk; Andreas Becher; Jürgen Teich (ReConFig, 2018)

Integration of FPGAs in Database Management Systems: Challenges and Opportunities. - Andreas Becher; Lekshmi B. G.; David Broneske; Tobias Drewes; Bala Gurumurthy; Klaus Meyer-Wegener; Thilo Pionteck; Gunter Saake; Jürgen Teich; Stefan Wildermann (Datenbank-Spektrum, 2018)

Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders. - Jorge Echavarria; Stefan Wildermann; Eduard Potwigin; Jürgen Teich (IEEE Embed. Syst. Lett., 2018)

Symmetry-Eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core Architectures. - Tobias Schwarzer; Andreas Weichslgartner; Michael Glaß; Stefan Wildermann; Peter Brand; Jürgen Teich (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs. - Andreas Weichslgartner; Stefan Wildermann; Deepak Gangadharan; Michael Glaß; Jürgen Teich (ACM Trans. Embed. Comput. Syst., 2018)

Resource-Aware Parameter Tuning for Real-Time Applications. - Dirk Gabriel; Walter Stechele; Stefan Wildermann (ARCS, 2019)

ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing. - Andreas Becher; Achim Herrmann; Stefan Wildermann; Jürgen Teich (BTW (Workshops), 2019)

Isolation-Aware Timing Analysis and Design Space Exploration for Predictable and Composable Many-Core Systems. - Behnaz Pourmohseni; Fedor Smirnov; Stefan Wildermann; Jürgen Teich (ECRTS, 2019)

Data-Driven Scenario-Based Application Mapping for Heterogeneous Many-Core Systems. - Jan Spieck; Stefan Wildermann; Tobias Schwarzer; Jürgen Teich; Michael Glaß (MCSoC, 2019)

Compiler-Based High-Level Synthesis of Application-Specific Processors on FPGAs. - Patrick Plagwitz; Franz-Josef Streit; Andreas Becher; Stefan Wildermann; Jürgen Teich (ReConFig, 2019)

Thermally Composable Hybrid Application Mapping for Real-Time Applications in Heterogeneous Many-Core Systems. - Behnaz Pourmohseni; Fedor Smirnov; Heba Khdr; Stefan Wildermann; Jürgen Teich; Jörg Henkel (RTSS, 2019)

Hard real-time application mapping reconfiguration for NoC-based many-core systems. - Behnaz Pourmohseni; Stefan Wildermann; Michael Glaß; Jürgen Teich (Real Time Syst., 2019)

Compilation of Dataflow Applications for Multi-Cores using Adaptive Multi-Objective Optimization. - Tobias Schwarzer; Joachim Falk; Simone Müller; Martín Letras; Christian Heidorn; Stefan Wildermann; Jürgen Teich (ACM Trans. Design Autom. Electr. Syst., 2019)

Run-Time Enforcement of Non-Functional Application Requirements in Heterogeneous Many-Core Systems. - Jürgen Teich; Behnaz Pourmohseni; Oliver Keszöcze; Jan Spieck; Stefan Wildermann (ASP-DAC, 2020)

Probabilistic Error Propagation through Approximated Boolean Networks. - Jorge Echavarria; Stefan Wildermann; Oliver Keszöcze; Jürgen Teich (DAC, 2020)

Scenario-Based Soft Real-Time Hybrid Application Mapping for MPSoCs. - Jan Spieck; Stefan Wildermann; Jürgen Teich (DAC, 2020)

SQL Query Processing Using an Integrated FPGA-based Near-Data Accelerator in ReProVide. - Lekshmi B. G.; Andreas Becher; Klaus Meyer-Wegener; Stefan Wildermann; Jürgen Teich (EDBT, 2020)

Real-Time Task Migration for Dynamic Resource Management in Many-Core Systems. - Behnaz Pourmohseni; Fedor Smirnov; Stefan Wildermann; Jürgen Teich (NG-RES@HiPEAC, 2020)

Secure Boot from Non-Volatile Memory for Programmable SoC Architectures. - Franz-Josef Streit; Florian Fritz; Andreas Becher; Stefan Wildermann; Stefan Werner; Martin Schmidt-Korth; Michael Pschyklenk; Jürgen Teich (HOST, 2020)

Providing Tamper-Secure SoC Updates Through Reconfigurable Hardware. - Franz-Josef Streit; Stefan Wildermann; Michael Pschyklenk; Jürgen Teich (ARC, 2021)

Run-Time Enforcement of Non-functional Program Properties on MPSoCs. - Jürgen Teich; Pouya Mahmoody; Behnaz Pourmohseni; Sascha Roloff; Wolfgang Schröder-Preikschat; Stefan Wildermann (A Journey of Embedded and Cyber-Physical Systems, 2021)

Approximate Logic Synthesis of Very Large Boolean Networks. - Jorge Echavarria; Stefan Wildermann; Jürgen Teich (DATE, 2021)

Choice - A Tunable PUF-Design for FPGAs. - Franz-Josef Streit; Paul Krüger; Andreas Becher; Jens Schlumberger; Stefan Wildermann; Jürgen Teich (FPL, 2021)

A Comparative Evaluation of Latency-Aware Energy Optimization Approaches in Many-Core Systems (Invited Paper). - Khalil Esper; Stefan Wildermann; Jürgen Teich (NG-RES@HiPEAC, 2021)

Enforcement FSMs: specification and verification of non-functional properties of program executions on MPSoCs. - Khalil Esper; Stefan Wildermann; Jürgen Teich (MEMOCODE, 2021)

Domain-Adaptive Soft Real-Time Hybrid Application Mapping for MPSoCs. - Jan Spieck; Stefan Wildermann; Jürgen Teich (MLCAD, 2021)

CORSICA: A Framework for Conducting Real-World Side-Channel Analysis. - Jens Schlumberger; Stefan Wildermann; Jürgen Teich (NTMS, 2021)

On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains. - Jorge Echavarria; Stefan Wildermann; Oliver Keszöcze; Faramarz Khosravi; Andreas Becher; Jürgen Teich (CoRR, 2021)

Speculative Dynamic Reconfiguration and Table Prefetching Using Query Look-Ahead in the ReProVide Near-Data-Processing System. - Lekshmi Beena Gopalakrishnan Nair; Andreas Becher; Stefan Wildermann; Klaus Meyer-Wegener; Jürgen Teich (Datenbank-Spektrum, 2021)

Putting IMT to the Test: Revisiting and Expanding Interval Matching Techniques and their Calibration for SCA. - Jens Trautmann 001; Nikolaos Patsiatzis; Andreas Becher; Stefan Wildermann; Jürgen Teich (ASHES@CCS, 2022)

Raw Filtering of JSON Data on FPGAs. - Tobias Hahn; Andreas Becher; Stefan Wildermann; Jürgen Teich (DATE, 2022)

Characterization of Side Channels on FPGA-based Off-The-Shelf Boards against Automated Attacks. - Jens Trautmann 001; Jürgen Teich; Stefan Wildermann (FCCM, 2022)

Real-Time Waveform Matching with a Digitizer at 10 GS/s. - Jens Trautmann 001; Nikolaos Patsiatzis; Andreas Becher; Jürgen Teich; Stefan Wildermann (FPL, 2022)

Auto-Tuning of Raw Filters for FPGAs. - Tobias Hahn; Stefan Wildermann; Jürgen Teich (FPL, 2022)

Multi-Requirement Enforcement of Non-Functional Properties on MPSoCs Using Enforcement FSMs - A Case Study. - Khalil Esper; Stefan Wildermann; Jürgen Teich (NG-RES@HiPEAC, 2022)

SIDAM: A Design Space Exploration Framework for Multi-sensor Embedded Systems Powered by Energy Harvesting. - Pierre-Louis Sixdenier; Stefan Wildermann; Daniel Ziegler 005; Jürgen Teich (SAMOS, 2022)

Task Migration Policy for Thermal-Aware Dynamic Performance Optimization in Many-Core Systems. - Behnaz Pourmohseni; Stefan Wildermann; Fedor Smirnov; Paul E. Meyer; Jürgen Teich (IEEE Access, 2022)

Design and error analysis of accuracy-configurable sequential multipliers via segmented carry chains. - Jorge Echavarria; Stefan Wildermann; Oliver Keszöcze; Faramarz Khosravi; Andreas Becher; Jürgen Teich (it Inf. Technol., 2022)

On Transferring Application Mapping Knowledge Between Differing MPSoC Architectures. - Jan Spieck; Stefan Wildermann; Jürgen Teich (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Semi-Automatic Locating of Cryptographic Operations in Side-Channel Traces. - Jens Trautmann 001; Arthur Beckers; Lennert Wouters; Stefan Wildermann; Ingrid Verbauwhede; Jürgen Teich (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022)

Design and Evaluation of a Tunable PUF Architecture for FPGAs. - Franz-Josef Streit; Paul Krüger; Andreas Becher; Stefan Wildermann; Jürgen Teich (ACM Trans. Reconfigurable Technol. Syst., 2022)

An FPGA Avro Parser Generator for Accelerated Data Stream Processing. - Tobias Hahn; Daniel Schüll; Stefan Wildermann; Jürgen Teich (BTW, 2023)

Special Session - Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications. - Jörg Henkel; Lokesh Siddhu; Lars Bauer; Jürgen Teich; Stefan Wildermann; Mehdi B. Tahoori; Mahta Mayahinia; Jerónimo Castrillón; Asif Ali Khan; Hamid Farzaneh; João Paulo C. de Lima; Jian-Jia Chen; et al. (CASES, 2023)

Seque: Lean and Energy-aware Data Management for IoT Gateways. - Pierre-Louis Sixdenier; Stefan Wildermann; Martin Ottens; Jürgen Teich (EDGE, 2023)

SPEAR-JSON: Selective Parsing of JSON to Enable Accelerated Stream Processing on FPGAs. - Tobias Hahn; Stefan Wildermann; Jürgen Teich (FPL, 2023)

RAVEN: Reinforcement Learning for Generating Verifiable Run-Time Requirement Enforcers for MPSoCs. - Khalil Esper; Jan Spieck; Pierre-Louis Sixdenier; Stefan Wildermann; Jürgen Teich (NG-RES@HiPEAC, 2023)

Hybrid Genetic Reinforcement Learning for Generating Run-Time Requirement Enforcers. - Jan Spieck; Pierre-Louis Sixdenier; Khalil Esper; Stefan Wildermann; Jürgen Teich (MEMOCODE, 2023)

A Learning-based Methodology for Scenario-aware Mapping of Soft Real-time Applications onto Heterogeneous MPSoCs. - Jan Spieck; Stefan Wildermann; Jürgen Teich (ACM Trans. Design Autom. Electr. Syst., 2023)

Automatic Synthesis of FSMs for Enforcing Non-functional Requirements on MPSoCs Using Multi-objective Evolutionary Algorithms. - Khalil Esper; Stefan Wildermann; Jürgen Teich (ACM Trans. Design Autom. Electr. Syst., 2023)

Range-Based Run-time Requirement Enforcement of Non-Functional Properties on MPSoCs. - Khalil Esper; Stefan Wildermann; Jürgen Teich (DATE, 2024)

ABACUS: ASIP-Based Avro Schema-Customizable Parser Acceleration on FPGAs. - Tobias Hahn; Daniel Schüll; Stefan Wildermann; Jürgen Teich (DDECS, 2024)

To Keep or Not to Keep - The Volatility of Replacement Policy Metadata in Hybrid Caches. - Nils Wilbert; Stefan Wildermann; Jürgen Teich (DIMES@SOSP, 2024)

CRESTS: Chronology-based Reconstruction for Side-Channel Trace Segmentation for XTS-AES on Complex Targets. - Paul Krüger; Stefan Wildermann; Jürgen Teich (EuroSec@EUROSYS, 2024)

JSON-CooP: A JSON Decompression/Parsing Co-Design for FPGAs. - Tobias Hahn; Stefan Wildermann; Jürgen Teich (FPL, 2024)

GRES: Guaranteed Remaining Energy Scheduling of Energy-harvesting Sensors by Quality Adaptation. - Pierre-Louis Sixdenier; Stefan Wildermann; Jürgen Teich (MECO, 2024)

Hybrid Cache Design Under Varying Power Supply Stability - A Comparative Study. - Nils Wilbert; Stefan Wildermann; Jürgen Teich (MEMSYS, 2024)

A Scenario-Based DVFS-Aware Hybrid Application Mapping Methodology for MPSoCs. - Jan Spieck; Stefan Wildermann; Jürgen Teich (ACM Trans. Design Autom. Electr. Syst., 2024)

Design, Calibration, and Evaluation of Real-time Waveform Matching on an FPGA-based Digitizer at 10 GS/s. - Jens Trautmann 001; Paul Krüger; Andreas Becher; Stefan Wildermann; Jürgen Teich (ACM Trans. Reconfigurable Technol. Syst., 2024)

Response Range Optimization for Run-Time Requirement Enforcement on MPSoCs. - Khalil Esper; Stefan Wildermann; Jürgen Teich (ASP-DAC, 2025)

Self-powered Embedded Systems: The Role of Non-volatile Memory Technology in IoT Devices. - Stefan Wildermann; Nils Wilbert; Tobias Häberlein; Jürgen Teich (Go Where the Bugs Are, 2025)

ReProVide: Query Optimisation and Near-Data Processing on Reconfigurable SoCs for Big Data Analysis. - Tobias Hahn; Maximilian S. Langohr; Stefan Meißner; Benedikt Döring; Stefan Wildermann; Klaus Meyer-Wegener; Jürgen Teich (BTW, 2025)

Breaking Confidentiality of XTS-AES Encrypted Data at Rest on Microprocessors Using Electromagnetic Side-Channel Attacks. - Paul Krüger; Stefan Wildermann; Jürgen Teich (HOST, 2025)

Run-Time Requirement Enforcement of Safety Requirements of Human-Robot Interactions. - Khalil Esper; Stefan Wildermann; Jürgen Teich (ICARA, 2025)

Modeling and Simulating Emerging Memory Technologies: A Tutorial. - Yun-Chih Chen; Tristan Taylan Seidl; Nils Hölscher; Christian Hakert; Minh Duy Truong; Jian-Jia Chen; João Paulo C. de Lima; Asif Ali Khan; Jerónimo Castrillón; Ali Nezhadi; Lokesh Siddhu; Hassan Nassar; et al. (CoRR, 2025)