Analytical modelling and leakage optimization in complementary resistive switch (CRS) crossbar arrays. - Stefano Ambrogio; Simone Balatti; Daniele Ielmini; David C. Gilmer (ESSDERC, 2014)

Statistical modeling of program and read variability in resistive switching devices. - Stefano Ambrogio; Simone Balatti; Antonio Cubeta; Daniele Ielmini (ISCAS, 2014)

Data retention statistics and modelling in HfO2 resistive switching memories. - Stefano Ambrogio; Simone Balatti; Zhongqiang Wang; Yu-Sheng Chen; Heng-Yuan Lee; Frederick T. Chen; Daniele Ielmini (IRPS, 2015)

Understanding pulsed-cycling variability and endurance in HfOx RRAM. - Simone Balatti; Stefano Ambrogio; Zhongqiang Wang; Scott Sills; Alessandro Calderoni; Nirmal Ramaswamy; Daniele Ielmini (IRPS, 2015)

True Random Number Generation by Variability of Resistive Switching in Oxide-Based Devices. - Simone Balatti; Stefano Ambrogio; Zhongqiang Wang; Daniele Ielmini (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

Neuromorphic computing with hybrid memristive/CMOS synapses for real-time learning. - Daniele Ielmini; Stefano Ambrogio; Valerio Milo; Simone Balatti; Zhongqiang Wang (ISCAS, 2016)

Modeling of reliability and neuromorphic application of resistive switching devices. - Stefano Ambrogio (2016)

Improved Deep Neural Network Hardware-Accelerators Based on Non-Volatile-Memory: The Local Gains Technique. - Irem Boybat; Carmelo di Nolfo; Stefano Ambrogio; Martina Bodini; Nathan C. P. Farinha; Robert M. Shelby; Pritish Narayanan; Severin Sidler; Hsinyu Tsai; Yusuf Leblebici; Geoffrey W. Burr (ICRC, 2017)

Neuromorphic devices and architectures for next-generation cognitive computing. - Geoffrey W. Burr; Pritish Narayanan; Robert M. Shelby; Stefano Ambrogio; Hsinyu Tsai; Scott L. Lewis; Kohji Hosokawa (ISCAS, 2017)

Reducing circuit design complexity for neuromorphic machine learning systems based on Non-Volatile Memory arrays. - Pritish Narayanan; Lucas L. Sanches; Alessandro Fumarola; Robert M. Shelby; Stefano Ambrogio; Jun-Woo Jang; Hyunsang Hwang; Yusuf Leblebici; Geoffrey W. Burr (ISCAS, 2017)

Stochastic Learning in Neuromorphic Hardware via Spike Timing Dependent Plasticity With RRAM Synapses. - Giacomo Pedretti; Valerio Milo; Stefano Ambrogio; Roberto Carboni; Stefano Bianchi; Alessandro Calderoni; Nirmal Ramaswamy; Alessandro S. Spinelli; Daniele Ielmini (IEEE J. Emerg. Sel. Topics Circuits Syst., 2018)

Equivalent-accuracy accelerated neural-network training using analogue memory. - Stefano Ambrogio; Pritish Narayanan; Hsinyu Tsai; Robert M. Shelby; Irem Boybat; Carmelo di Nolfo; Severin Sidler; Massimo Giordano; Martina Bodini; Nathan C. P. Farinha; Benjamin Killeen; Christina Cheng; et al. (Nat., 2018)

A 4-Transistors/1-Resistor Hybrid Synapse Based on Resistive Switching Memory (RRAM) Capable of Spike-Rate-Dependent Plasticity (SRDP). - Valerio Milo; Giacomo Pedretti; Roberto Carboni; Alessandro Calderoni; Nirmal Ramaswamy; Stefano Ambrogio; Daniele Ielmini (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Energy-efficient continual learning in hybrid supervised-unsupervised neural networks with PCM synapses. - Stefano Bianchi; I. Muñoz-Martín; Giacomo Pedretti; Octavian Melnic; Stefano Ambrogio; Daniele Ielmini (VLSI Circuits, 2019)

Analog-to-Digital Conversion With Reconfigurable Function Mapping for Neural Networks Activation Function Acceleration. - Massimo Giordano; Giorgio Cristiano; Koji Ishibashi; Stefano Ambrogio; Hsinyu Tsai; Geoffrey W. Burr; Pritish Narayanan (IEEE J. Emerg. Sel. Topics Circuits Syst., 2019)

AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed. - Hung-Yang Chang; Pritish Narayanan; Scott C. Lewis; Nathan C. P. Farinha; Kohji Hosokawa; Charles Mackin; Hsinyu Tsai; Stefano Ambrogio; An Chen 002; Geoffrey W. Burr (IBM J. Res. Dev., 2019)

Accelerating Deep Neural Networks with Analog Memory Devices. - Stefano Ambrogio; Pritish Narayanan; Hsinyu Tsai; Charles Mackin; Katherine Spoon; An Chen 002; Andrea Fasoli; Alexander M. Friz; Geoffrey W. Burr (AICAS, 2020)

Neuromorphic Computing with Phase Change, Device Reliability, and Variability Challenges. - Charles Mackin; Pritish Narayanan; Stefano Ambrogio; Hsinyu Tsai; Katie Spoon; Andrea Fasoli; An Chen 002; Alexander M. Friz; Robert M. Shelby; Geoffrey W. Burr (IRPS, 2020)

Optimization of Analog Accelerators for Deep Neural Networks Inference. - Andrea Fasoli; Stefano Ambrogio; Pritish Narayanan; Hsinyu Tsai; Charles Mackin; Katherine Spoon; Alexander M. Friz; An Chen 002; Geoffrey W. Burr (ISCAS, 2020)

Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigation. - Robert L. Bruce; Syed Ghazi Sarwat; Irem Boybat; Cheng-Wei Cheng; Wanki Kim; S. R. Nandakumar; Charles Mackin; Timothy Philip; Zuoguang Liu; Kevin Brew; Nanbo Gong; Injo Ok; et al. (IRPS, 2021)

Circuit Techniques for Efficient Acceleration of Deep Neural Network Inference with Analog-AI (Invited). - Kohji Hosokawa; Pritish Narayanan; Stefano Ambrogio; Hsinyu Tsai; Charles Mackin; Andrea Fasoli; Alexander M. Friz; An Chen 002; Jose Luquin; Katherine Spoon; Geoffrey W. Burr; Scott C. Lewis (ISCAS, 2021)

Toward Software-Equivalent Accuracy on Transformer-Based Deep Neural Networks With Analog Memory Devices. - Katie Spoon; Hsinyu Tsai; An Chen 002; Malte J. Rasch; Stefano Ambrogio; Charles Mackin; Andrea Fasoli; Alexander M. Friz; Pritish Narayanan; Milos Stanisavljevic; Geoffrey W. Burr (Frontiers Comput. Neurosci., 2021)

Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers. - Atsuya Okazaki; Pritish Narayanan; Stefano Ambrogio; Kohji Hosokawa; Hsinyu Tsai; Akiyo Nomura; Takeo Yasuda; Charles Mackin; Alexander M. Friz; Masatoshi Ishii; Yasuteru Kohda; Katie Spoon; et al. (ISCAS, 2022)

Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited). - Hsinyu Tsai; Pritish Narayanan; Shubham Jain; Stefano Ambrogio; Kohji Hosokawa; Masatoshi Ishii; Charles Mackin; Ching-Tzu Chen; Atsuya Okazaki; Akiyo Nomura; Irem Boybat; Ramachandran Muralidhar; et al. (ISCAS, 2023)

Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited). - Geoffrey W. Burr; Pritish Narayanan; Stefano Ambrogio; Atsuya Okazaki; Hsinyu Tsai; Kohji Hosokawa; Charles Mackin; Akiyo Nomura; Takeo Yasuda; J. Demarest; Kevin Brew; Victor Chan; et al. (VLSI Technology and Circuits, 2023)

An analog-AI chip for energy-efficient speech recognition and transcription. - Stefano Ambrogio; Pritish Narayanan; Atsuya Okazaki; Andrea Fasoli; Charles Mackin; Kohji Hosokawa; Akiyo Nomura; Takeo Yasuda; An Chen 002; Alexander M. Friz; Masatoshi Ishii; Jose Luquin; et al. (Nat., 2023)

Chain-of-Descriptions: Improving Code LLMs for VHDL Code Generation and Summarization. - Prashanth Vijayaraghavan; Apoorva Nitsure; Charles Mackin; Luyao Shi; Stefano Ambrogio; Arvind Haran; Viresh Paruthi; Ali El-Zein; Dan Coops; David Beymer; Tyler Baldwin; Ehsan Degan (MLCAD, 2024)

VHDL-Eval: A Framework for Evaluating Large Language Models in VHDL Code Generation. - Prashanth Vijayaraghavan; Luyao Shi; Stefano Ambrogio; Charles Mackin; Apoorva Nitsure; David Beymer; Ehsan Degan (CoRR, 2024)

Roadmap to Neuromorphic Computing with Emerging Technologies. - Adnan Mehonic; Daniele Ielmini; Kaushik Roy 001; Onur Mutlu; Shahar Kvatinsky; Teresa Serrano-Gotarredona; Bernabé Linares-Barranco; Sabina Spiga; Sergey Savelev; Alexander G. Balanov; Nitin Chawla; Giuseppe Desoli; et al. (CoRR, 2024)

Rapid yet accurate Tile-circuit and device modeling for Analog In-Memory Computing. - Jose Luquin; Charles Mackin; Stefano Ambrogio; An Chen 002; F. Baldi; G. Miralles; Malte J. Rasch; Julian Büchel; M. Lalwani; W. Ponghiran; Paul Solomon; Hsinyu Tsai; et al. (CoRR, 2025)