Coupling latency-insensitivity with variable-latency for better than worst case design: a RISC case study. - Mario R. Casu; Stefano Colazzo; Paolo Mantovani (ACM Great Lakes Symposium on VLSI, 2011)

SURF algorithm in FPGA: A novel architecture for high demanding industrial applications. - Niccolò Battezzati; Stefano Colazzo; M. Maffione; L. Senepa (DATE, 2012)