Efficient Mathematical Accelerator Design Coupled with an Interleaved Multi-threading RISC-V Microprocessor. - Abdallah Cheikh; Stefano Sordillo; Antonio Mastrandrea; Francesco Menichelli; Mauro Olivieri (ApplePies, 2019)

Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment. - Marcello Barbirotta; Antonio Mastrandrea; Francesco Menichelli; Francesco Vigli; Luigi Blasi; Abdallah Cheikh; Stefano Sordillo; Fabio Di Gennaro; Mauro Olivieri (DFT, 2020)

Klessydra-T: Designing Vector Coprocessors for Multi-Threaded Edge-Computing Cores. - Abdallah Cheikh; Stefano Sordillo; Antonio Mastrandrea; Francesco Menichelli; Giuseppe Scotti; Mauro Olivieri (CoRR, 2020)

Klessydra-T: Designing Vector Coprocessors for Multithreaded Edge-Computing Cores. - Abdallah Cheikh; Stefano Sordillo; Antonio Mastrandrea; Francesco Menichelli; Giuseppe Scotti; Mauro Olivieri (IEEE Micro, 2021)