The Complexity of Computing Optimal Assignments of Generalized Propositional Formulae - Steffen Reith; Heribert Vollmer (Electron. Colloquium Comput. Complex., 1998)

A note on closure properties of logspace MOD classes. - Ulrich Hertrampf; Steffen Reith; Heribert Vollmer (Inf. Process. Lett., 2000)

A polynomial-time approximation scheme for base station positioning in UMTS networks. - Matthias Galota; Christian Glaßer; Steffen Reith; Heribert Vollmer (DIAL-M, 2001)

On boolean lowness and boolean highness. - Steffen Reith; Klaus W. Wagner (Theor. Comput. Sci., 2001)

Generalized satisfiability problems. - Steffen Reith (2001)

Equivalence and Isomorphism for Boolean Constraint Satisfaction. - Elmar Böhler; Edith Hemaspaandra; Steffen Reith; Heribert Vollmer (CSL, 2002)

On the Complexity of Some Equivalence Problems for Propositional Calculi. - Steffen Reith (MFCS, 2003)

Optimal satisfiability for propositional calculi and constraint satisfaction problems. - Steffen Reith; Heribert Vollmer (Inf. Comput., 2003)

The Complexity of Boolean Constraint Isomorphism. - Elmar Böhler; Edith Hemaspaandra; Steffen Reith; Heribert Vollmer (STACS, 2004)

The complexity of base station positioning in cellular networks. - Christian Glaßer; Steffen Reith; Heribert Vollmer (Discret. Appl. Math., 2005)

Quantified Constraints: The Complexity of Decision and Counting for Bounded Alternation - Michael Bauland; Elmar Böhler; Nadia Creignou; Steffen Reith; Henning Schnoor; Heribert Vollmer (Electron. Colloquium Comput. Complex., 2005)

Bases for Boolean co-clones. - Elmar Böhler; Steffen Reith; Henning Schnoor; Heribert Vollmer (Inf. Process. Lett., 2005)

The Complexity of Problems for Quantified Constraints. - Heribert Vollmer; Michael Bauland; Elmar Böhler; Nadia Creignou; Steffen Reith; Henning Schnoor (Electron. Colloquium Comput. Complex., 2007)

On Optimized FPGA Implementations of the SHA-3 Candidate Groestl. - Bernhard Jungk; Steffen Reith; Jürgen Apfelbeck (IACR Cryptol. ePrint Arch., 2009)

On FPGA-Based Implementations of the SHA-3 Candidate Grøstl. - Bernhard Jungk; Steffen Reith (ReConFig, 2010)

Boolean Circuits as a Data Structure for Boolean Functions: Efficient Algorithms and Hard Problems - Elmar Böhler; Nadia Creignou; Matthias Galota; Steffen Reith; Henning Schnoor; Heribert Vollmer (Log. Methods Comput. Sci., 2010)

On FPGA-based implementations of Gröstl. - Bernhard Jungk; Steffen Reith (IACR Cryptol. ePrint Arch., 2010)

Side-channel resistant AES architecture utilizing randomized composite field representations. - Bernhard Jungk; Marc Stöttinger; Jan Gampe; Steffen Reith; Sorin A. Huss (FPT, 2012)

On a FPGA-based method for authentication using Edwards curves. - André Himmighofen; Bernhard Jungk; Steffen Reith (ReCoSoC, 2013)

On hybrid SIDH schemes using Edwards and Montgomery curve arithmetic. - Michael Meyer 001; Steffen Reith; Fabio Campos (IACR Cryptol. ePrint Arch., 2017)

Open Source Value Chains for Addressing Security Issues Efficiently. - Arnd Weber; Steffen Reith; Dirk Kuhlmann; Michael Kasper; Jean-Pierre Seifert; Christoph Krauß (QRS Companion, 2018)

Souveränität und die IT-Wertschöpfungskette. - Arnd Weber; Steffen Reith; Michael Kasper; Dirk Kuhlmann; Jean-Pierre Seifert; Christoph Krauß (Datenschutz und Datensicherheit, 2018)

On Lions and Elligators: An efficient constant-time implementation of CSIDH. - Michael Meyer 001; Fabio Campos; Steffen Reith (IACR Cryptol. ePrint Arch., 2018)

A faster way to the CSIDH. - Michael Meyer 001; Steffen Reith (IACR Cryptol. ePrint Arch., 2018)

LMS vs XMSS: Comparison of Stateful Hash-Based Signature Schemes on ARM Cortex-M4. - Fabio Campos; Tim Kohlstadt; Steffen Reith; Marc Stöttinger (IACR Cryptol. ePrint Arch., 2020)

Verified Value Chains, Innovation and Competition. - Arnd Weber; Sylvain Guilley; René Rathfelder; Marc Stöttinger; Christoph Lüth; Maja Malenko; Torsten Grawunder; Steffen Reith; Armand Puccetti; Jean-Pierre Seifert; Norbert Herfurth; Hagen Sankowski; et al. (CSR, 2023)

Evaluating an Open-Source Hardware Approach from HDL to GDS for a Security Chip Design - a Review of the Final Stage of Project HEP. - Tim Henkes; Steffen Reith; Marc Stöttinger; Norbert Herfurth; Goran Panic; Julian Wälde; Fabian Buschkowski; Pascal Sasdrich; Christoph Lüth; Milan Funck; Tuba Kiyan; Arnd Weber; et al. (DATE, 2024)