FAUPU - A design framework for the development of programmable image processing architectures. - Marc Reichenbach; Tobias Lieske; Steffen Vaas; Konrad Häublein; Dietmar Fey (ReConFig, 2015)

An Application-Specific Instruction Set Processor for Power Quality Monitoring. - Steffen Vaas; Marc Reichenbach; Dietmar Fey (IPDPS Workshops, 2016)

The R2-D2 toolchain - Automated porting of safety-critical applications to FPGAs. - Steffen Vaas; Marc Reichenbach; Ulrich Margull; Dietmar Fey (ReConFig, 2016)

The best of both: High-performance anc deterministic real-time executive by application-specific multi-core SoCs. - Steffen Vaas; Peter Ulbrich; Marc Reichenbach; Dietmar Fey (DASIP, 2017)

System on chip generation for multi-sensor and sensor fusion applications. - Tobias Lieske; Benjamin Pfundt; Steffen Vaas; Marc Reichenbach; Dietmar Fey (SAMOS, 2017)

Comparison of Lane Detection Algorithms for ADAS Using Embedded Hardware Architectures. - Marc Reichenbach; Lukas Liebischer; Steffen Vaas; Dietmar Fey (DASIP, 2018)

Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems. - Wolfgang Bauer; Philipp Holzinger; Marc Reichenbach; Steffen Vaas; Paul Hartke; Dietmar Fey (Euro-Par Workshops, 2018)

Autonomous Driving in the Curriculum of Computer Architecture. - Sebastian Rachuj; Marc Reichenbach; Steffen Vaas; Dietmar Fey (EWME, 2018)

Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands. - Steffen Vaas; Peter Ulbrich; Marc Reichenbach; Dietmar Fey (J. Signal Process. Syst., 2019)

Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design. - Steffen Vaas; Peter Ulbrich; Christian Eichler; Peter Wägemann; Marc Reichenbach; Dietmar Fey (ISORC, 2021)

Anwendungsspezifische Mehrkernarchitekturen für sicherheitskritische Echtzeitanwendungen. - Steffen Vaas (Dr. Hut, 2022)