Systematic stability-analysis method for analog circuits. - Gerd Vandersteen; Stephane Bronckers; Petr Dobrovolný; Yves Rolain (DATE, 2006)

Interactive presentation: Simulation methodology and experimental verification for the analysis of substrate noise on LC-VCO's. - Stephane Bronckers; Charlotte Soens; Geert Van der Plas; Gerd Vandersteen; Yves Rolain (DATE, 2007)

A Single-Inductor Dual-Band VCO in a 0.06mm2 5.6GHz Multi-Band Front-End in 90nm Digital CMOS. - Jonathan Borremans; Stephane Bronckers; Piet Wambacq; Maarten Kuijk; Jan Craninckx (ISSCC, 2008)

A 52GHz Phased-Array Receiver Front-End in 90nm Digital CMOS. - Karen Scheir; Stephane Bronckers; Jonathan Borremans; Piet Wambacq; Yves Rolain (ISSCC, 2008)

A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS. - Jonathan Borremans; Andrea Bevilacqua; Stephane Bronckers; Morin Dehan; Maarten Kuijk; Piet Wambacq; Jan Craninckx (IEEE J. Solid State Circuits, 2008)

A 52 GHz Phased-Array Receiver Front-End in 90 nm Digital CMOS. - Karen Scheir; Stephane Bronckers; Jonathan Borremans; Piet Wambacq; Yves Rolain (IEEE J. Solid State Circuits, 2008)

A Methodology to Predict the Impact of Substrate Noise in Analog/RF Systems. - Stephane Bronckers; Karen Scheir; Geert Van der Plas; Gerd Vandersteen; Yves Rolain (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Experimental Analysis of the Coupling Mechanisms Between a 4 GHz PPA and a 5-7 GHz LC -VCO. - Stephane Bronckers; Gerd Vandersteen; Ludwig De Locht; Michael Libois; Geert Van der Plas; Yves Rolain (IEEE Trans. Instrum. Meas., 2009)

Design issues and considerations for low-cost 3D TSV IC technology. - Geert Van der Plas; Paresh Limaye; Abdelkarim Mercha; Herman Oprins; Cristina Torregiani; Steven Thijs; Dimitri Linten; Michele Stucchi; Guruprasad Katti; Dimitrios Velenis; Domae Shinichi; Vladimir Cherman; et al. (ISSCC, 2010)

Substrate Noise Coupling Mechanisms in Lightly Doped CMOS Transistors. - Stephane Bronckers; Geert Van der Plas; Gerd Vandersteen; Yves Rolain (IEEE Trans. Instrum. Meas., 2010)

Design Issues and Considerations for Low-Cost 3-D TSV IC Technology. - Geert Van der Plas; Paresh Limaye; Igor Loi; Abdelkarim Mercha; Herman Oprins; Cristina Torregiani; Steven Thijs; Dimitri Linten; Michele Stucchi; Guruprasad Katti; Dimitrios Velenis; Vladimir Cherman; et al. (IEEE J. Solid State Circuits, 2011)