An Auto-adaptative Reconfigurable Architecture for the Control. - Nicolas Ventroux; Stéphane Chevobbe; Frédéric Blanc 001; Thierry Collette (Asia-Pacific Computer Systems Architecture Conference, 2004)

Advances in Practical Implementation of the Digital Media Processing: Towards Reconfigurable Computation. - Eva Dokládalová; Stéphane Chevobbe; Frédéric Blanc 001 (EWIMT, 2004)

RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems. - Stéphane Chevobbe; Nicolas Ventroux; Frédéric Blanc 001; Thierry Collette (SAMOS, 2004)

Control Unit for Parallel Embedded System. - Stéphane Chevobbe; Raphaël David; Frédéric Blanc 001; Thierry Collette; Olivier Sentieys (ReCoSoC, 2006)

Reconfigurable Operator Based Multimedia Embedded Processor. - Daniel Ménard; Emmanuel Casseau; Shafqat Khan; Olivier Sentieys; Stéphane Chevobbe; Stéphane Guyetant; Raphaël David (ARC, 2009)

Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems. - Maroun Ojail; Raphaël David; Stéphane Chevobbe; Didier Demigny (DSD, 2009)

A reconfigurable FIR/FFT unit for wireless telecommunication systems. - Maroun Ojail; Raphaël David; Stéphane Chevobbe; Didier Demigny (FPL, 2009)

A multi-core signal processor for heterogeneous reconfigurable computing. - Davide Rossi; Fabio Campi; Antonio Deledda; Claudio Mucci; Stefano Pucillo; Sean Whitty; Rolf Ernst; Stéphane Chevobbe; Stéphane Guyetant; Matthias Kühnle; Michael Hübner 001; Jürgen Becker 001; et al. (SoC, 2009)

Reducing Reconfiguration Overheads in Heterogeneous Multicore RSoCs with Predictive Configuration Management. - Stéphane Chevobbe; Stéphane Guyetant (Int. J. Reconfigurable Comput., 2009)

Exploration platform of embedded simd architecture for autonomous retinas. - Stéphane Chevobbe; Suresh Pajaniradja; Laurent Letellier (DASIP, 2010)

A wavelet-based demosaicking algorithm for embedded applications. - Sébastien Courroux; Stéphane Guyetant; Stéphane Chevobbe; Michel Paindavoine (DASIP, 2010)

Scheduling, binding and routing system for a run-time reconfigurable operator based multimedia architecture. - Erwan Raffin; Christophe Wolinski; François Charot; Krzysztof Kuchcinski; Stéphane Guyetant; Stéphane Chevobbe; Emmanuel Casseau (DASIP, 2010)

CERA: A Channel Estimation Reconfigurable Architecture. - Céline Azar; Maroun Ojail; Stéphane Chevobbe; Raphaël David (ICT, 2010)

Service de reconfiguration prédictif pour plateforme multicoeur hétérogène. - Stéphane Chevobbe; Stéphane Guyetant; Mehdi Darouich (Tech. Sci. Informatiques, 2010)

Error prediction based on concurrent self-test and reduced slack time. - Valentin Gherman; J. Massas; Samuel Evain; Stéphane Chevobbe; Yannick Bonhomme (DATE, 2011)

Dynamic routing strategy for embedded distributed architectures. - Celine Azar; Stéphane Chevobbe; Yves Lhuillier; Jean-Philippe Diguet (ICECS, 2011)

A small footprint interleaved multithreaded processor for embedded systems. - Charly Bechara; Aurelien Berhault; Nicolas Ventroux; Stéphane Chevobbe; Yves Lhuillier; Raphaël David; Daniel Etiemble (ICECS, 2011)

Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture. - Erwan Raffin; Christophe Wolinski; François Charot; Emmanuel Casseau; Antoine Floch; Krzysztof Kuchcinski; Stéphane Chevobbe; Stéphane Guyetant (Int. J. Embed. Real Time Commun. Syst., 2012)

Gesture recognition on smart cameras. - Aziz Dziri; Stéphane Chevobbe; Mehdi Darouich (Sensors, Cameras, and Systems for Industrial and Scientific Applications, 2013)

SNet, a flexible, scalable network paradigm for manycore architectures. - Celine Azar; Stéphane Chevobbe; Yves Lhuillier; Jean-Philippe Diguet (NOCS, 2013)

Use of wavelet for image processing in smart cameras with low hardware resources. - Sébastien Courroux; Stéphane Chevobbe; Mehdi Darouich; Michel Paindavoine (J. Syst. Archit., 2013)

Embedded wavelet-based face recognition under variable position. - Pascal Cotret; Stéphane Chevobbe; Mehdi Darouich (Real-Time Image and Video Processing, 2015)

A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing. - Laurent Millet; Stéphane Chevobbe; Caaliph Andriamisaina; Edith Beigné; Fabrice Guellec; Thomas Dombek; Lamine Benaissa; Edouard Deschaseaux; Marc Duranton; K. Benchehida; Mehdi Darouich; Maria Lepecq (VLSI Circuits, 2018)

Advanced 3D Technologies and Architectures for 3D Smart Image Sensors. - Pascal Vivet; Gilles Sicard; Laurent Millet; Stéphane Chevobbe; Karim Ben Chehida; Luis Angel Cubero; Monte Alegre; Maxence Bouvier; Alexandre Valentian; Maria Lepecq; Thomas Dombek; Olivier Bichler; et al. (DATE, 2019)

A 5500-frames/s 85-GOPS/W 3-D Stacked BSI Vision Chip Based on Parallel In-Focal-Plane Acquisition and Processing. - Laurent Millet; Stéphane Chevobbe; Caaliph Andriamisaina; Lamine Benaissa; Edouard Deschaseaux; Edith Beigné; Karim Ben Chehida; Maria Lepecq; Mehdi Darouich; Fabrice Guellec; Thomas Dombek; Marc Duranton (IEEE J. Solid State Circuits, 2019)

Work-in-Progress: Smart data reduction in SLAM methods for embedded systems. - Quentin Picard; Stéphane Chevobbe; Mehdi Darouich; Zoe Mandelli; Mathieu Carrier; Jean-Yves Didier (CASES, 2022)

Image Quantization Towards Data Reduction: Robustness Analysis for SLAM Methods On Embedded Platforms. - Quentin Picard; Stéphane Chevobbe; Mehdi Darouich; Jean-Yves Didier (ICIP, 2022)

A survey on real-time 3D scene reconstruction with SLAM methods in embedded systems. - Quentin Picard; Stéphane Chevobbe; Mehdi Darouich; Jean-Yves Didier (CoRR, 2023)

End-to-End Implementation of a Convolutional Neural Network on a 3D-Integrated Image Sensor with Macropixel Array. - Maria Lepecq; Thomas Dalgaty; William Fabre; Stéphane Chevobbe (Sensors, 2023)